On 5/15/26 10:07 PM, Akhil P Oommen wrote: > Add support for Current Limit Extension (CLX) feature found on a few A8x > GPUs. This feature is required to limit the peak current consumption to > avoid HW spec violation on GX/MX rails. > > Add the necessary HFI interface support to pass the recommended CLX and > IFF/PCLX limits tables to the GMU. Per-GPU configuration is consumed > from the catalog entries. > > Signed-off-by: Akhil P Oommen <[email protected]> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 15 ++++++++ > drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 71 > +++++++++++++++++++++++++++++++++++ > 2 files changed, 86 insertions(+) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h > b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h > index eb431e5e00b1..f6a3f1924bb3 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h > @@ -34,6 +34,19 @@ struct cpu_gpu_lock { > uint64_t regs[62]; > }; > > +struct a6xx_limits_tbl { > + /** @tbl: List of limits table **/ > + struct a6xx_hfi_limits_tbl *tbl; > + /** @count: Number of entries in the list **/ > + u32 count; > +}; > + > +#define DECLARE_ADRENO_LIMITS_TABLE(name) \ > +static const struct a6xx_limits_tbl name = { \ > + .tbl = name ## _tbl, \ > + .count = ARRAY_SIZE(name ## _tbl), \ > +} > + > /** > * struct a6xx_info - a6xx specific information from device table > * > @@ -54,6 +67,8 @@ struct a6xx_info { > u32 gmu_cgc_mode; > u32 prim_fifo_threshold; > const struct a6xx_bcm *bcms; > + const struct a6xx_hfi_clx_table_v2_cmd *clx_tbl; > + const struct a6xx_limits_tbl *limits_tbl; > }; > > struct a6xx_gpu { > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c > b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c > index 487c2736f2b3..13ae34d0d898 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c > @@ -886,6 +886,73 @@ static int a6xx_hfi_enable_acd(struct a6xx_gmu *gmu) > return 0; > } > > +static int a6xx_hfi_enable_iff_pclx(struct a6xx_gmu *gmu, const struct > a6xx_limits_tbl *limits) > +{ > + struct a6xx_hfi_table_entry *entry; > + struct a6xx_hfi_table *tbl; > + size_t entry_size; > + size_t size; > + int ret; > + > + if (!limits) > + return 0;
Is this considered a valid configuation (CLX on without IFF_PCLX data)? If not, let's throw an error here since it's only called from _enable_clx() Konrad
