Bruce,



On 23-04-13 22:05, Bruce Perens wrote:
> On 4/23/2013 12:54 PM, Curt, WE7U wrote:
>> On Thu, 18 Apr 2013, Kristoff Bonne wrote:
>>
>> Now there's a BeagleBone for $45 too.  I haven't looked at the specs to see 
>> whether it has floating point, but maybe another possibility?
>>
>> 1GHz Cortex-A8, 2GB on-board flash, microSD, microHDMI, ethernet, $45:
>>
>>        http://goo.gl/SsqE6
> It's a Sitara, related to the one in our AM335x starter kit which we'll
> be showing at Dayton, except that the starter kit has a touchscreen,
> bluetooth, and wifi. I think the BeagleBone Black has 4 processors on
> chip: a Cortex A8 (which I think does have floating point), C7 DSP (OK
> if you want to invest the time), two PRUs. A PRU is very simple scalar
> in-order 32 bit processor with 4K program RAM and the ability to access
> all of the on-chip peripherals and to share a pair of mailbox registers
> and some RAM with the main processor. It does the real-time and
> sleep-mode jobs more efficiently than the main processor.
This kind-of makes me think of TI's OMAP soc devices that have one (or 
more) cortex-A CPUs + an additional cortex-M for "slow stuff".


Just wondering, will it actually be able to access these additional 
processors?

I have a pandaboard which is OMAP4430 based. That chip also has an 
additional DSP core and a GPU.

However, I never really found a good document that describes how to 
actually use the. I read that the DSP core had to be addresses via some 
special API, that was about it.


So, will we be able to use these additional cores?
I would be interested to know how coding this kind of enviroment really 
is done.


73
Kristoff - ON1ARF

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