Hi,
fyi: storing configuration data in stm32f4 flash is already being
supported by stm32f4_vrom.c/.h in the sm1000 code.
Regards,
Danilo
On 13.03.2018 13:56, Andy Wood wrote:
>
> www.st.com/resource/en/application_note/dm00036065.pdf
> <http://www.st.com/resource/en/application_note/dm00036065.pdf>
>
>
> Application note for using flash as emulated eeprom.
>
>
>
> ------------------------------------------------------------------------
> *From:* Jacob Falzon <jacobfalzon2...@gmail.com>
> *Sent:* 13 March 2018 12:48
> *To:* freetel-codec2@lists.sourceforge.net
> *Subject:* Re: [Freetel-codec2] UART, SPI Pins on SM1000
>
> Thanks a lot for the help.
>
> I'll be sure to take a look at it.
>
> I was afraid that the system was going to run out of memory if I
> expanded on the program.
>
> Ran into something else I couldn't understand on the schematic.
>
> Not all the VDD and VSS pins of the F4 are connected externally
> together. Is there a reason for that?
>
>
> On Fri, Mar 9, 2018 at 10:43 PM, glen english <g...@cortexrf.com.au
> <mailto:g...@cortexrf.com.au>> wrote:
>
> The F4 flash is organised into sectors,
>
> small, medium, large
>
> the small sectors are organised into small pages, can be erased on
> their own while the micro is running, and are useful in
> conjunction with a wear levelling algorthm for NV memory, I
> describe below.
>
> I would suggest say choosing a small sector/page for NV.
>
> if you need 64 bytes, use an area of say 4kbytes and store your
> data in consecutive 128 byte lumps.
>
> IE
>
> erase the whole lot
>
> when you need to write settings, write your 64 bytes.
>
> when you need to write again, write into the next 64 bytes
>
> when you need to write again, write into the next 64 bytes
>
> and so on
>
> when you run out of 64 byte chunks (IE you reach the end of the
> page or the sector) and THEN do you trigger a page or sector erase
>
> this minimises flash wear.
>
> for reading, the software just reads the chunks up to where it
> finds erased (0xff) cells , it knows which is most recent
>
> or you can compute a CRC for each say 60 bytes in the top 4 bytes
> of the 64 bytes. if it fails crc check, it is probably an unused
> block (or a bad block where if it is your block you need to read
> then you'd read out of main flash defaults and write them in)
>
>
>
>
>
>
>
> On 10/03/2018 8:31 AM, David Rowe wrote:
>
> The EEPROM is not used - plenty of storage on board the
> stm32f4. Not sure how much memory is being used at run time,
> but its usually pretty tight. Less than half the flash is
> being used I think.
>
> - David
>
> On 10/03/18 02:11, Jacob Falzon wrote:
>
> Thanks!
>
> If you don't mind, I would also like to ask you regarding
> the EEPROM.
>
> Is it currently being used by the board or is it also
> implemented for expansion purposes? I thought it might
> have been used for storing prefences to be loaded but
> apparently from the comments its eems to be done from
> Flash rather than the external EEPROM.
>
> If it is used was it implemented because of a lack of
> on-board memory on the STM32F4? Might you know how much
> memory is consumed as the SM1000 is running and how I
> could verify it?
>
> Kindest regards and sorry for any bother.
>
>
>
> On Wed, Mar 7, 2018 at 9:43 PM, David Rowe
> <da...@rowetel.com <mailto:da...@rowetel.com>
> <mailto:da...@rowetel.com <mailto:da...@rowetel.com>>> wrote:
>
> Hi Jacob,
>
> 1/ Test is an unused feature at present, you can treat
> it like a GPIO
>
> 2/ We use an opto-isolator so we don't have to provide
> a switch to
> the external radios PTT circuit. An
> electro-mechanical relay would
> have been an alternative. It's usually a mechanical
> switch on your
> PTT mic.
> - David
>
> On 08/03/18 00:22, Jacob Falzon wrote:
>
> Hello again,
>
> there are another two pins for the SM1000 that I
> wanted to know
> more about.
>
> The Test pin connects to a Self-Test circuit. What
> exactly is
> this used to test for please?
> Also there is another pin named CPPT that connects
> to an
> optoisolator. I understand that the CPPT signal is
> used to
> trigger the PTT for the radio but why is the
> opto-isolator
> implemented please?
>
> Thank you very much for your attention.
>
> Kindest regards,
>
>
>
> On Sat, Feb 24, 2018 at 9:01 PM, Jacob Falzon
> <jacobfalzon2...@gmail.com
> <mailto:jacobfalzon2...@gmail.com>
> <mailto:jacobfalzon2...@gmail.com
> <mailto:jacobfalzon2...@gmail.com>>
> <mailto:jacobfalzon2...@gmail.com
> <mailto:jacobfalzon2...@gmail.com>
> <mailto:jacobfalzon2...@gmail.com
> <mailto:jacobfalzon2...@gmail.com>>>> wrote:
>
> Thank you very much for your attention.
>
> Have a good night!
>
> On 24 Feb 2018 8:26 PM, "David Rowe"
> <da...@rowetel.com <mailto:da...@rowetel.com>
> <mailto:da...@rowetel.com <mailto:da...@rowetel.com>>
> <mailto:da...@rowetel.com
> <mailto:da...@rowetel.com> <mailto:da...@rowetel.com
> <mailto:da...@rowetel.com>>>> wrote:
>
> Hi Jacob,
>
> These pins are just broken out as GPIOs
> or for future
> expansion.
>
> - David
>
> On 25/02/18 00:54, Jacob Falzon wrote:
>
> Hi there,
>
> i was looking at the schematic and I
> came upon the
> SPI pins
> and the UART pins in the schematic.
>
> The SPI pins ( SCK, MOSI, MISO, NSS)
> do not seem to be
> connected with an external component.
> What is their
> purpose?
>
> Also the UART pins whilst available
> are they currently
> utilised for some purpose?
>
> Many thanks for your kind attention.
>
> Regards,
>
>
>
>
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