Hello list,
It's just been brought to my attention that a versioning patch applied
in r3380 on 2017-11-16 is causing some problems with building
freedv-dev, as it can't find version.h
We are working on this, in the mean time:
1/ checkout and build codec2-dev in a separate directory to freedv-dev.
2/ Use this cmake line for freedv-dev:
~/freedv-dev/build_linux$ cmake -DCMAKE_BUILD_TYPE=Debug
-DCODEC2_INCLUDE_DIRS="/path/to/codec2-dev/src;/path/to/codec2-dev/build_linux"
-DCODEC2_LIBRARY=/path/to/codec2-dev/build_linux/src/libcodec2.so
-DUSE_STATIC_CODEC2=FALSE ..
- David
On 10/03/18 02:11, Jacob Falzon wrote:
Thanks!
If you don't mind, I would also like to ask you regarding the EEPROM.
Is it currently being used by the board or is it also implemented for
expansion purposes? I thought it might have been used for storing
prefences to be loaded but apparently from the comments its eems to be
done from Flash rather than the external EEPROM.
If it is used was it implemented because of a lack of on-board memory on
the STM32F4? Might you know how much memory is consumed as the SM1000 is
running and how I could verify it?
Kindest regards and sorry for any bother.
On Wed, Mar 7, 2018 at 9:43 PM, David Rowe <da...@rowetel.com
<mailto:da...@rowetel.com>> wrote:
Hi Jacob,
1/ Test is an unused feature at present, you can treat it like a GPIO
2/ We use an opto-isolator so we don't have to provide a switch to
the external radios PTT circuit. An electro-mechanical relay would
have been an alternative. It's usually a mechanical switch on your
PTT mic.
- David
On 08/03/18 00:22, Jacob Falzon wrote:
Hello again,
there are another two pins for the SM1000 that I wanted to know
more about.
The Test pin connects to a Self-Test circuit. What exactly is
this used to test for please?
Also there is another pin named CPPT that connects to an
optoisolator. I understand that the CPPT signal is used to
trigger the PTT for the radio but why is the opto-isolator
implemented please?
Thank you very much for your attention.
Kindest regards,
On Sat, Feb 24, 2018 at 9:01 PM, Jacob Falzon
<jacobfalzon2...@gmail.com <mailto:jacobfalzon2...@gmail.com>
<mailto:jacobfalzon2...@gmail.com
<mailto:jacobfalzon2...@gmail.com>>> wrote:
Thank you very much for your attention.
Have a good night!
On 24 Feb 2018 8:26 PM, "David Rowe" <da...@rowetel.com
<mailto:da...@rowetel.com>
<mailto:da...@rowetel.com <mailto:da...@rowetel.com>>> wrote:
Hi Jacob,
These pins are just broken out as GPIOs or for future
expansion.
- David
On 25/02/18 00:54, Jacob Falzon wrote:
Hi there,
i was looking at the schematic and I came upon the
SPI pins
and the UART pins in the schematic.
The SPI pins ( SCK, MOSI, MISO, NSS) do not seem to be
connected with an external component. What is their
purpose?
Also the UART pins whilst available are they currently
utilised for some purpose?
Many thanks for your kind attention.
Regards,
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