https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128111
--- Comment #12 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Kyrylo Tkachov <[email protected]>: https://gcc.gnu.org/g:e1167aef8d7477fe3aa152cdc61a62b92a1c4f3b commit r17-6070-ge1167aef8d7477fe3aa152cdc61a62b92a1c4f3b Author: Kyrylo Tkachov <[email protected]> Date: Mon Nov 9 11:14:11 2026 +0100 internal-fn: Fix the high half of widening clmul on narrow _BitInt [PR128111] expand_CLMUL_WIDEN takes a shortcut when the whole product fits in the mode of the operands and stores zero as the high half. The test compares against the precision of the mode. For an unsigned _BitInt narrower than its mode the bits of the product above the precision of the type are the high half, so the shortcut returns zero where it should not. Operands of known small range hit the same path. For example, with unsigned _BitInt(3) a = 7 and b = 7: unsigned _BitInt(3) hi; unsigned _BitInt(3) lo = __builtin_clmulg (a, b, &hi); the product is 0b10101, so lo is 0b101 and hi is 0b10. The expansion returned hi == 0. Compute the high half as the product shifted right by the precision of the type when the product needs more bits than the type has. Bootstrapped and tested on aarch64-linux-gnu. gcc/ChangeLog: PR middle-end/128111 * internal-fn.cc (expand_CLMUL_WIDEN): Compute the high half when the product fits in the mode but not in the type. gcc/testsuite/ChangeLog: PR middle-end/128111 * gcc.dg/bitint-147.c: New test. Signed-off-by: Kyrylo Tkachov <[email protected]>
