https://gcc.gnu.org/g:c6af3094b52b550a54df39b5a5f4ca0ee26d1158
commit c6af3094b52b550a54df39b5a5f4ca0ee26d1158
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Fri Oct 18 16:44:22 2024 -0400
Move xxeval case before alternative that needs a temporary register.
2024-10-18 Michael Meissner <meiss...@linux.ibm.com>
gcc/
* config/rs6000/genfusion.pl (gen_logical_addsubf): Move xxeval case
before alternative that needs a temporary register.
* config/rs6000/fusion.md: Regenerate.
Diff:
---
gcc/config/rs6000/fusion.md | 792 ++++++++++++++++++++---------------------
gcc/config/rs6000/genfusion.pl | 14 +-
2 files changed, 403 insertions(+), 403 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 6b5830908a51..215a3aae074f 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -1871,170 +1871,170 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vand
(define_insn "*fuse_vand_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"%v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"%v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vand %3,%1,%0\;vand %3,%3,%2
vand %3,%1,%0\;vand %3,%3,%2
vand %3,%1,%0\;vand %3,%3,%2
- vand %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,1"
+ xxeval %x3,%x2,%x1,%x0,1
+ vand %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vand
(define_insn "*fuse_vandc_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;vand %3,%3,%2
vandc %3,%1,%0\;vand %3,%3,%2
vandc %3,%1,%0\;vand %3,%3,%2
- vandc %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,2"
+ xxeval %x3,%x2,%x1,%x0,2
+ vandc %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vand
(define_insn "*fuse_veqv_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
veqv %3,%1,%0\;vand %3,%3,%2
veqv %3,%1,%0\;vand %3,%3,%2
veqv %3,%1,%0\;vand %3,%3,%2
- veqv %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,9"
+ xxeval %x3,%x2,%x1,%x0,9
+ veqv %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vand
(define_insn "*fuse_vnand_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnand %3,%1,%0\;vand %3,%3,%2
vnand %3,%1,%0\;vand %3,%3,%2
vnand %3,%1,%0\;vand %3,%3,%2
- vnand %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,14"
+ xxeval %x3,%x2,%x1,%x0,14
+ vnand %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vand
(define_insn "*fuse_vnor_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnor %3,%1,%0\;vand %3,%3,%2
vnor %3,%1,%0\;vand %3,%3,%2
vnor %3,%1,%0\;vand %3,%3,%2
- vnor %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,8"
+ xxeval %x3,%x2,%x1,%x0,8
+ vnor %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vand
(define_insn "*fuse_vor_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vor %3,%1,%0\;vand %3,%3,%2
vor %3,%1,%0\;vand %3,%3,%2
vor %3,%1,%0\;vand %3,%3,%2
- vor %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,7"
+ xxeval %x3,%x2,%x1,%x0,7
+ vor %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vand
(define_insn "*fuse_vorc_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;vand %3,%3,%2
vorc %3,%1,%0\;vand %3,%3,%2
vorc %3,%1,%0\;vand %3,%3,%2
- vorc %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,11"
+ xxeval %x3,%x2,%x1,%x0,11
+ vorc %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vand
(define_insn "*fuse_vxor_vand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vxor %3,%1,%0\;vand %3,%3,%2
vxor %3,%1,%0\;vand %3,%3,%2
vxor %3,%1,%0\;vand %3,%3,%2
- vxor %4,%1,%0\;vand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,6"
+ xxeval %x3,%x2,%x1,%x0,6
+ vxor %4,%1,%0\;vand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vandc
@@ -2057,23 +2057,23 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vandc
(define_insn "*fuse_vandc_vandc"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;vandc %3,%3,%2
vandc %3,%1,%0\;vandc %3,%3,%2
vandc %3,%1,%0\;vandc %3,%3,%2
- vandc %4,%1,%0\;vandc %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,13"
+ xxeval %x3,%x2,%x1,%x0,13
+ vandc %4,%1,%0\;vandc %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vandc
@@ -2204,23 +2204,23 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> veqv
(define_insn "*fuse_vandc_veqv"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;veqv %3,%3,%2
vandc %3,%1,%0\;veqv %3,%3,%2
vandc %3,%1,%0\;veqv %3,%3,%2
- vandc %4,%1,%0\;veqv %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,210"
+ xxeval %x3,%x2,%x1,%x0,210
+ vandc %4,%1,%0\;veqv %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> veqv
@@ -2297,23 +2297,23 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> veqv
(define_insn "*fuse_vorc_veqv"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;veqv %3,%3,%2
vorc %3,%1,%0\;veqv %3,%3,%2
vorc %3,%1,%0\;veqv %3,%3,%2
- vorc %4,%1,%0\;veqv %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,75"
+ xxeval %x3,%x2,%x1,%x0,75
+ vorc %4,%1,%0\;veqv %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> veqv
@@ -2336,506 +2336,506 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vnand
(define_insn "*fuse_vand_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vand %3,%1,%0\;vnand %3,%3,%2
vand %3,%1,%0\;vnand %3,%3,%2
vand %3,%1,%0\;vnand %3,%3,%2
- vand %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,254"
+ xxeval %x3,%x2,%x1,%x0,254
+ vand %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vnand
(define_insn "*fuse_vandc_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;vnand %3,%3,%2
vandc %3,%1,%0\;vnand %3,%3,%2
vandc %3,%1,%0\;vnand %3,%3,%2
- vandc %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,253"
+ xxeval %x3,%x2,%x1,%x0,253
+ vandc %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vnand
(define_insn "*fuse_veqv_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (not:VM (xor:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (not:VM (xor:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
veqv %3,%1,%0\;vnand %3,%3,%2
veqv %3,%1,%0\;vnand %3,%3,%2
veqv %3,%1,%0\;vnand %3,%3,%2
- veqv %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,246"
+ xxeval %x3,%x2,%x1,%x0,246
+ veqv %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vnand
(define_insn "*fuse_vnand_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnand %3,%1,%0\;vnand %3,%3,%2
vnand %3,%1,%0\;vnand %3,%3,%2
vnand %3,%1,%0\;vnand %3,%3,%2
- vnand %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,241"
+ xxeval %x3,%x2,%x1,%x0,241
+ vnand %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vnand
(define_insn "*fuse_vnor_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnor %3,%1,%0\;vnand %3,%3,%2
vnor %3,%1,%0\;vnand %3,%3,%2
vnor %3,%1,%0\;vnand %3,%3,%2
- vnor %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,247"
+ xxeval %x3,%x2,%x1,%x0,247
+ vnor %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vnand
(define_insn "*fuse_vor_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vor %3,%1,%0\;vnand %3,%3,%2
vor %3,%1,%0\;vnand %3,%3,%2
vor %3,%1,%0\;vnand %3,%3,%2
- vor %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,248"
+ xxeval %x3,%x2,%x1,%x0,248
+ vor %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vnand
(define_insn "*fuse_vorc_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;vnand %3,%3,%2
vorc %3,%1,%0\;vnand %3,%3,%2
vorc %3,%1,%0\;vnand %3,%3,%2
- vorc %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,244"
+ xxeval %x3,%x2,%x1,%x0,244
+ vorc %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vnand
(define_insn "*fuse_vxor_vnand"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vxor %3,%1,%0\;vnand %3,%3,%2
vxor %3,%1,%0\;vnand %3,%3,%2
vxor %3,%1,%0\;vnand %3,%3,%2
- vxor %4,%1,%0\;vnand %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,249"
+ xxeval %x3,%x2,%x1,%x0,249
+ vxor %4,%1,%0\;vnand %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vnor
(define_insn "*fuse_vand_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vand %3,%1,%0\;vnor %3,%3,%2
vand %3,%1,%0\;vnor %3,%3,%2
vand %3,%1,%0\;vnor %3,%3,%2
- vand %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,224"
+ xxeval %x3,%x2,%x1,%x0,224
+ vand %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vnor
(define_insn "*fuse_vandc_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;vnor %3,%3,%2
vandc %3,%1,%0\;vnor %3,%3,%2
vandc %3,%1,%0\;vnor %3,%3,%2
- vandc %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,208"
+ xxeval %x3,%x2,%x1,%x0,208
+ vandc %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vnor
(define_insn "*fuse_veqv_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (not:VM (xor:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (not:VM (xor:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
veqv %3,%1,%0\;vnor %3,%3,%2
veqv %3,%1,%0\;vnor %3,%3,%2
veqv %3,%1,%0\;vnor %3,%3,%2
- veqv %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,96"
+ xxeval %x3,%x2,%x1,%x0,96
+ veqv %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vnor
(define_insn "*fuse_vnand_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnand %3,%1,%0\;vnor %3,%3,%2
vnand %3,%1,%0\;vnor %3,%3,%2
vnand %3,%1,%0\;vnor %3,%3,%2
- vnand %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,16"
+ xxeval %x3,%x2,%x1,%x0,16
+ vnand %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vnor
(define_insn "*fuse_vnor_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnor %3,%1,%0\;vnor %3,%3,%2
vnor %3,%1,%0\;vnor %3,%3,%2
vnor %3,%1,%0\;vnor %3,%3,%2
- vnor %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,112"
+ xxeval %x3,%x2,%x1,%x0,112
+ vnor %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vnor
(define_insn "*fuse_vor_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vor %3,%1,%0\;vnor %3,%3,%2
vor %3,%1,%0\;vnor %3,%3,%2
vor %3,%1,%0\;vnor %3,%3,%2
- vor %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,128"
+ xxeval %x3,%x2,%x1,%x0,128
+ vor %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vnor
(define_insn "*fuse_vorc_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;vnor %3,%3,%2
vorc %3,%1,%0\;vnor %3,%3,%2
vorc %3,%1,%0\;vnor %3,%3,%2
- vorc %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,64"
+ xxeval %x3,%x2,%x1,%x0,64
+ vorc %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vnor
(define_insn "*fuse_vxor_vnor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (and:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vxor %3,%1,%0\;vnor %3,%3,%2
vxor %3,%1,%0\;vnor %3,%3,%2
vxor %3,%1,%0\;vnor %3,%3,%2
- vxor %4,%1,%0\;vnor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,144"
+ xxeval %x3,%x2,%x1,%x0,144
+ vxor %4,%1,%0\;vnor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vor
(define_insn "*fuse_vand_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vand %3,%1,%0\;vor %3,%3,%2
vand %3,%1,%0\;vor %3,%3,%2
vand %3,%1,%0\;vor %3,%3,%2
- vand %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,31"
+ xxeval %x3,%x2,%x1,%x0,31
+ vand %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vor
(define_insn "*fuse_vandc_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;vor %3,%3,%2
vandc %3,%1,%0\;vor %3,%3,%2
vandc %3,%1,%0\;vor %3,%3,%2
- vandc %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,47"
+ xxeval %x3,%x2,%x1,%x0,47
+ vandc %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vor
(define_insn "*fuse_veqv_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
veqv %3,%1,%0\;vor %3,%3,%2
veqv %3,%1,%0\;vor %3,%3,%2
veqv %3,%1,%0\;vor %3,%3,%2
- veqv %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,159"
+ xxeval %x3,%x2,%x1,%x0,159
+ veqv %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vor
(define_insn "*fuse_vnand_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnand %3,%1,%0\;vor %3,%3,%2
vnand %3,%1,%0\;vor %3,%3,%2
vnand %3,%1,%0\;vor %3,%3,%2
- vnand %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,239"
+ xxeval %x3,%x2,%x1,%x0,239
+ vnand %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vor
(define_insn "*fuse_vnor_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnor %3,%1,%0\;vor %3,%3,%2
vnor %3,%1,%0\;vor %3,%3,%2
vnor %3,%1,%0\;vor %3,%3,%2
- vnor %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,143"
+ xxeval %x3,%x2,%x1,%x0,143
+ vnor %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vor
(define_insn "*fuse_vor_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"%v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"%v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vor %3,%1,%0\;vor %3,%3,%2
vor %3,%1,%0\;vor %3,%3,%2
vor %3,%1,%0\;vor %3,%3,%2
- vor %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,127"
+ xxeval %x3,%x2,%x1,%x0,127
+ vor %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vor
(define_insn "*fuse_vorc_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;vor %3,%3,%2
vorc %3,%1,%0\;vor %3,%3,%2
vorc %3,%1,%0\;vor %3,%3,%2
- vorc %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,191"
+ xxeval %x3,%x2,%x1,%x0,191
+ vorc %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vor
(define_insn "*fuse_vxor_vor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vxor %3,%1,%0\;vor %3,%3,%2
vxor %3,%1,%0\;vor %3,%3,%2
vxor %3,%1,%0\;vor %3,%3,%2
- vxor %4,%1,%0\;vor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,111"
+ xxeval %x3,%x2,%x1,%x0,111
+ vxor %4,%1,%0\;vor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vorc
@@ -2948,23 +2948,23 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vorc
(define_insn "*fuse_vorc_vorc"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (ior:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,v,wa"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (ior:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;vorc %3,%3,%2
vorc %3,%1,%0\;vorc %3,%3,%2
vorc %3,%1,%0\;vorc %3,%3,%2
- vorc %4,%1,%0\;vorc %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,79"
+ xxeval %x3,%x2,%x1,%x0,79
+ vorc %4,%1,%0\;vorc %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vorc
@@ -2987,170 +2987,170 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vxor
(define_insn "*fuse_vand_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (and:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vand %3,%1,%0\;vxor %3,%3,%2
vand %3,%1,%0\;vxor %3,%3,%2
vand %3,%1,%0\;vxor %3,%3,%2
- vand %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,30"
+ xxeval %x3,%x2,%x1,%x0,30
+ vand %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vxor
(define_insn "*fuse_vandc_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;vxor %3,%3,%2
vandc %3,%1,%0\;vxor %3,%3,%2
vandc %3,%1,%0\;vxor %3,%3,%2
- vandc %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,45"
+ xxeval %x3,%x2,%x1,%x0,45
+ vandc %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vxor
(define_insn "*fuse_veqv_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
veqv %3,%1,%0\;vxor %3,%3,%2
veqv %3,%1,%0\;vxor %3,%3,%2
veqv %3,%1,%0\;vxor %3,%3,%2
- veqv %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,150"
+ xxeval %x3,%x2,%x1,%x0,150
+ veqv %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vxor
(define_insn "*fuse_vnand_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnand %3,%1,%0\;vxor %3,%3,%2
vnand %3,%1,%0\;vxor %3,%3,%2
vnand %3,%1,%0\;vxor %3,%3,%2
- vnand %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,225"
+ xxeval %x3,%x2,%x1,%x0,225
+ vnand %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vxor
(define_insn "*fuse_vnor_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa")))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v")))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vnor %3,%1,%0\;vxor %3,%3,%2
vnor %3,%1,%0\;vxor %3,%3,%2
vnor %3,%1,%0\;vxor %3,%3,%2
- vnor %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,135"
+ xxeval %x3,%x2,%x1,%x0,135
+ vnor %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vxor
(define_insn "*fuse_vor_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (ior:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vor %3,%1,%0\;vxor %3,%3,%2
vor %3,%1,%0\;vxor %3,%3,%2
vor %3,%1,%0\;vxor %3,%3,%2
- vor %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,120"
+ xxeval %x3,%x2,%x1,%x0,120
+ vor %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vxor
(define_insn "*fuse_vorc_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (ior:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;vxor %3,%3,%2
vorc %3,%1,%0\;vxor %3,%3,%2
vorc %3,%1,%0\;vxor %3,%3,%2
- vorc %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,180"
+ xxeval %x3,%x2,%x1,%x0,180
+ vorc %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vxor
(define_insn "*fuse_vxor_vxor"
- [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,v,wa")
- (xor:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,v,wa")
- (match_operand:VM 1 "vector_fusion_operand"
"%v,v,v,v,wa"))
- (match_operand:VM 2 "vector_fusion_operand" "v,v,v,v,wa")))
- (clobber (match_scratch:VM 4 "=X,X,X,&v,X"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (xor:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v")
+ (match_operand:VM 1 "vector_fusion_operand"
"%v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vxor %3,%1,%0\;vxor %3,%3,%2
vxor %3,%1,%0\;vxor %3,%3,%2
vxor %3,%1,%0\;vxor %3,%3,%2
- vxor %4,%1,%0\;vxor %3,%4,%2
- xxeval %x3,%x2,%x1,%x0,105"
+ xxeval %x3,%x2,%x1,%x0,105
+ vxor %4,%1,%0\;vxor %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; add-add fusion pattern generated by gen_addadd
(define_insn "*fuse_add_add"
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 89c479f32e8f..de1590741a67 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -280,7 +280,7 @@ sub gen_logical_addsubf
push (@outer_ops, ( "rsubf" ));
}
$c4 = "${constraint},${constraint},${constraint},${constraint}";
- $c5 = "${constraint},${constraint},${constraint},${constraint},wa";
+ $c5 = "${constraint},${constraint},${constraint},wa,${constraint}";
OUTER: foreach $outer ( @outer_ops ) {
$outer_name = "${vchr}${outer}";
$is_subf = ( $outer eq "subf" );
@@ -394,21 +394,21 @@ EOF
;; $ftype fusion pattern generated by gen_logical_addsubf
;; $kind $inner_op -> $outer_name
(define_insn "*fuse_${inner_op}_${outer_name}"
- [(set (match_operand:${mode} 3 "${vect_pred}"
"=&0,&1,&${constraint},${constraint},wa")
+ [(set (match_operand:${mode} 3 "${vect_pred}"
"=&0,&1,&${constraint},wa,${constraint}")
${vect_outer_exp})
- (clobber (match_scratch:${mode} 4 "=X,X,X,&${constraint},X"))]
+ (clobber (match_scratch:${mode} 4 "=X,X,X,X,&${constraint}"))]
"(TARGET_P10_FUSION)"
"@
${inner_op} %3,%1,%0\\;${outer_op} %3,${outer_32}
${inner_op} %3,%1,%0\\;${outer_op} %3,${outer_32}
${inner_op} %3,%1,%0\\;${outer_op} %3,${outer_32}
- ${inner_op} %4,%1,%0\\;${outer_op} %3,${outer_42}
- xxeval %x3,%x2,%x1,%x0,${xxeval}"
+ xxeval %x3,%x2,%x1,%x0,${xxeval}
+ ${inner_op} %4,%1,%0\\;${outer_op} %3,${outer_42}"
[(set_attr "type" "$fuse_type")
(set_attr "cost" "6")
(set_attr "length" "8")
- (set_attr "prefixed" "*,*,*,*,yes")
- (set_attr "isa" "*,*,*,*,xxeval")])
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
EOF
}
