https://gcc.gnu.org/g:d0a932fb53ccdf5155d1111b90632901c55446b8
commit r12-10793-gd0a932fb53ccdf5155d1111b90632901c55446b8
Author: liuhongt <hongtao....@intel.com>
Date: Tue Oct 29 02:09:39 2024 -0700
Fix ICE due to subreg:us_truncate.
Force_operand issues an ICE when input
is (subreg:DI (us_truncate:V8QI)), it's probably because it's an
invalid rtx, So refine backend patterns for that.
gcc/ChangeLog:
PR target/117318
* config/i386/sse.md (*avx512vl_<code>v2div2qi2_mask_store_1):
Rename to ..
(avx512vl_<code>v2div2qi2_mask_store_1): .. this.
(avx512vl_<code>v2div2qi2_mask_store_2): Change to
define_expand.
(*avx512vl_<code><mode>v4qi2_mask_store_1): Rename to ..
(avx512vl_<code><mode>v4qi2_mask_store_1): .. this.
(avx512vl_<code><mode>v4qi2_mask_store_2): Change to
define_expand.
(*avx512vl_<code><mode>v8qi2_mask_store_1): Rename to ..
(avx512vl_<code><mode>v8qi2_mask_store_1): .. this.
(avx512vl_<code><mode>v8qi2_mask_store_2): Change to
define_expand.
(*avx512vl_<code><mode>v4hi2_mask_store_1): Rename to ..
(avx512vl_<code><mode>v4hi2_mask_store_1): .. this.
(avx512vl_<code><mode>v4hi2_mask_store_2): Change to
define_expand.
(*avx512vl_<code>v2div2hi2_mask_store_1): Rename to ..
(avx512vl_<code>v2div2hi2_mask_store_1): .. this.
(avx512vl_<code>v2div2hi2_mask_store_2): Change to
define_expand.
(*avx512vl_<code>v2div2si2_mask_store_1): Rename to ..
(avx512vl_<code>v2div2si2_mask_store_1): .. this.
(avx512vl_<code>v2div2si2_mask_store_2): Change to
define_expand.
(*avx512f_<code>v8div16qi2_mask_store_1): Rename to ..
(avx512f_<code>v8div16qi2_mask_store_1): .. this.
(avx512f_<code>v8div16qi2_mask_store_2): Change to
define_expand.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr117318.c: New test.
(cherry picked from commit bc0eeccf27a084461a2d5661e23468350acb43da)
Diff:
---
gcc/config/i386/sse.md | 268 +++++++++++--------------------
gcc/testsuite/gcc.target/i386/pr117318.c | 12 ++
2 files changed, 110 insertions(+), 170 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index c94c8eceb338..3ad96f321a67 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13853,7 +13853,7 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "*avx512vl_<code>v2div2qi2_mask_store_1"
+(define_insn "avx512vl_<code>v2div2qi2_mask_store_1"
[(set (match_operand:V2QI 0 "memory_operand" "=m")
(vec_merge:V2QI
(any_truncate:V2QI
@@ -13867,28 +13867,19 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn_and_split "avx512vl_<code>v2div2qi2_mask_store_2"
- [(set (match_operand:HI 0 "memory_operand")
- (subreg:HI
- (vec_merge:V2QI
- (any_truncate:V2QI
- (match_operand:V2DI 1 "register_operand"))
- (vec_select:V2QI
- (subreg:V4QI
- (vec_concat:V2HI
- (match_dup 0)
- (const_int 0)) 0)
- (parallel [(const_int 0) (const_int 1)]))
- (match_operand:QI 2 "register_operand")) 0))]
- "TARGET_AVX512VL && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (vec_merge:V2QI
- (any_truncate:V2QI (match_dup 1))
- (match_dup 0)
- (match_dup 2)))]
- "operands[0] = adjust_address_nv (operands[0], V2QImode, 0);")
+(define_expand "avx512vl_<code>v2div2qi2_mask_store_2"
+ [(match_operand:HI 0 "memory_operand")
+ (any_truncate:V2QI
+ (match_operand:V2DI 1 "register_operand"))
+ (match_operand:QI 2 "register_operand")]
+ "TARGET_AVX512VL"
+{
+ operands[0] = adjust_address_nv (operands[0], V2QImode, 0);
+ emit_insn (gen_avx512vl_<code>v2div2qi2_mask_store_1 (operands[0],
+ operands[1],
+ operands[2]));
+ DONE;
+})
(define_insn "*avx512vl_<code><mode>v4qi2_store_1"
[(set (match_operand:V4QI 0 "memory_operand" "=m")
@@ -13957,7 +13948,7 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "*avx512vl_<code><mode>v4qi2_mask_store_1"
+(define_insn "avx512vl_<code><mode>v4qi2_mask_store_1"
[(set (match_operand:V4QI 0 "memory_operand" "=m")
(vec_merge:V4QI
(any_truncate:V4QI
@@ -13971,29 +13962,19 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn_and_split "avx512vl_<code><mode>v4qi2_mask_store_2"
- [(set (match_operand:SI 0 "memory_operand")
- (subreg:SI
- (vec_merge:V4QI
- (any_truncate:V4QI
- (match_operand:VI4_128_8_256 1 "register_operand"))
- (vec_select:V4QI
- (subreg:V8QI
- (vec_concat:V2SI
- (match_dup 0)
- (const_int 0)) 0)
- (parallel [(const_int 0) (const_int 1)
- (const_int 2) (const_int 3)]))
- (match_operand:QI 2 "register_operand")) 0))]
- "TARGET_AVX512VL && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (vec_merge:V4QI
- (any_truncate:V4QI (match_dup 1))
- (match_dup 0)
- (match_dup 2)))]
- "operands[0] = adjust_address_nv (operands[0], V4QImode, 0);")
+(define_expand "avx512vl_<code><mode>v4qi2_mask_store_2"
+ [(match_operand:SI 0 "memory_operand")
+ (any_truncate:V4QI
+ (match_operand:VI4_128_8_256 1 "register_operand"))
+ (match_operand:QI 2 "register_operand")]
+ "TARGET_AVX512VL"
+{
+ operands[0] = adjust_address_nv (operands[0], V4QImode, 0);
+ emit_insn (gen_avx512vl_<code><mode>v4qi2_mask_store_1 (operands[0],
+ operands[1],
+ operands[2]));
+ DONE;
+})
(define_mode_iterator VI2_128_BW_4_256
[(V8HI "TARGET_AVX512BW") V8SI])
@@ -14065,7 +14046,7 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "*avx512vl_<code><mode>v8qi2_mask_store_1"
+(define_insn "avx512vl_<code><mode>v8qi2_mask_store_1"
[(set (match_operand:V8QI 0 "memory_operand" "=m")
(vec_merge:V8QI
(any_truncate:V8QI
@@ -14079,31 +14060,19 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn_and_split "avx512vl_<code><mode>v8qi2_mask_store_2"
- [(set (match_operand:DI 0 "memory_operand")
- (subreg:DI
- (vec_merge:V8QI
- (any_truncate:V8QI
- (match_operand:VI2_128_BW_4_256 1 "register_operand"))
- (vec_select:V8QI
- (subreg:V16QI
- (vec_concat:V2DI
- (match_dup 0)
- (const_int 0)) 0)
- (parallel [(const_int 0) (const_int 1)
- (const_int 2) (const_int 3)
- (const_int 4) (const_int 5)
- (const_int 6) (const_int 7)]))
- (match_operand:QI 2 "register_operand")) 0))]
- "TARGET_AVX512VL && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (vec_merge:V8QI
- (any_truncate:V8QI (match_dup 1))
- (match_dup 0)
- (match_dup 2)))]
- "operands[0] = adjust_address_nv (operands[0], V8QImode, 0);")
+(define_expand "avx512vl_<code><mode>v8qi2_mask_store_2"
+ [(match_operand:DI 0 "memory_operand")
+ (any_truncate:V8QI
+ (match_operand:VI2_128_BW_4_256 1 "register_operand"))
+ (match_operand:QI 2 "register_operand")]
+ "TARGET_AVX512VL"
+{
+ operands[0] = adjust_address_nv (operands[0], V8QImode, 0);
+ emit_insn (gen_avx512vl_<code><mode>v8qi2_mask_store_1 (operands[0],
+ operands[1],
+ operands[2]));
+ DONE;
+})
(define_mode_iterator PMOV_SRC_MODE_4 [V4DI V2DI V4SI])
(define_mode_attr pmov_dst_4
@@ -14225,7 +14194,7 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "*avx512vl_<code><mode>v4hi2_mask_store_1"
+(define_insn "avx512vl_<code><mode>v4hi2_mask_store_1"
[(set (match_operand:V4HI 0 "memory_operand" "=m")
(vec_merge:V4HI
(any_truncate:V4HI
@@ -14243,30 +14212,19 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn_and_split "avx512vl_<code><mode>v4hi2_mask_store_2"
- [(set (match_operand:DI 0 "memory_operand")
- (subreg:DI
- (vec_merge:V4HI
- (any_truncate:V4HI
- (match_operand:VI4_128_8_256 1 "register_operand"))
- (vec_select:V4HI
- (subreg:V8HI
- (vec_concat:V2DI
- (match_dup 0)
- (const_int 0)) 0)
- (parallel [(const_int 0) (const_int 1)
- (const_int 2) (const_int 3)]))
- (match_operand:QI 2 "register_operand")) 0))]
- "TARGET_AVX512VL && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (vec_merge:V4HI
- (any_truncate:V4HI (match_dup 1))
- (match_dup 0)
- (match_dup 2)))]
- "operands[0] = adjust_address_nv (operands[0], V4HImode, 0);")
-
+(define_expand "avx512vl_<code><mode>v4hi2_mask_store_2"
+ [(match_operand:DI 0 "memory_operand")
+ (any_truncate:V4HI
+ (match_operand:VI4_128_8_256 1 "register_operand"))
+ (match_operand:QI 2 "register_operand")]
+ "TARGET_AVX512VL"
+{
+ operands[0] = adjust_address_nv (operands[0], V4HImode, 0);
+ emit_insn (gen_avx512vl_<code><mode>v4hi2_mask_store_1 (operands[0],
+ operands[1],
+ operands[2]));
+ DONE;
+})
(define_insn "*avx512vl_<code>v2div2hi2_store_1"
[(set (match_operand:V2HI 0 "memory_operand" "=m")
@@ -14327,7 +14285,7 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "*avx512vl_<code>v2div2hi2_mask_store_1"
+(define_insn "avx512vl_<code>v2div2hi2_mask_store_1"
[(set (match_operand:V2HI 0 "memory_operand" "=m")
(vec_merge:V2HI
(any_truncate:V2HI
@@ -14341,28 +14299,19 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn_and_split "avx512vl_<code>v2div2hi2_mask_store_2"
- [(set (match_operand:SI 0 "memory_operand")
- (subreg:SI
- (vec_merge:V2HI
- (any_truncate:V2HI
- (match_operand:V2DI 1 "register_operand"))
- (vec_select:V2HI
- (subreg:V4HI
- (vec_concat:V2SI
- (match_dup 0)
- (const_int 0)) 0)
- (parallel [(const_int 0) (const_int 1)]))
- (match_operand:QI 2 "register_operand")) 0))]
- "TARGET_AVX512VL && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (vec_merge:V2HI
- (any_truncate:V2HI (match_dup 1))
- (match_dup 0)
- (match_dup 2)))]
- "operands[0] = adjust_address_nv (operands[0], V2HImode, 0);")
+(define_expand "avx512vl_<code>v2div2hi2_mask_store_2"
+ [(match_operand:SI 0 "memory_operand")
+ (any_truncate:V2HI
+ (match_operand:V2DI 1 "register_operand"))
+ (match_operand:QI 2 "register_operand")]
+ "TARGET_AVX512VL"
+{
+ operands[0] = adjust_address_nv (operands[0], V2HImode, 0);
+ emit_insn (gen_avx512vl_<code>v2div2hi2_mask_store_1 (operands[0],
+ operands[1],
+ operands[2]));
+ DONE;
+})
(define_expand "truncv2div2si2"
[(set (match_operand:V2SI 0 "register_operand")
@@ -14470,7 +14419,7 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "*avx512vl_<code>v2div2si2_mask_store_1"
+(define_insn "avx512vl_<code>v2div2si2_mask_store_1"
[(set (match_operand:V2SI 0 "memory_operand" "=m")
(vec_merge:V2SI
(any_truncate:V2SI
@@ -14484,28 +14433,19 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn_and_split "avx512vl_<code>v2div2si2_mask_store_2"
- [(set (match_operand:DI 0 "memory_operand")
- (subreg:DI
- (vec_merge:V2SI
- (any_truncate:V2SI
- (match_operand:V2DI 1 "register_operand"))
- (vec_select:V2SI
- (subreg:V4SI
- (vec_concat:V2DI
- (match_dup 0)
- (const_int 0)) 0)
- (parallel [(const_int 0) (const_int 1)]))
- (match_operand:QI 2 "register_operand")) 0))]
- "TARGET_AVX512VL && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (vec_merge:V2SI
- (any_truncate:V2SI (match_dup 1))
- (match_dup 0)
- (match_dup 2)))]
- "operands[0] = adjust_address_nv (operands[0], V2SImode, 0);")
+(define_expand "avx512vl_<code>v2div2si2_mask_store_2"
+ [(match_operand:DI 0 "memory_operand")
+ (any_truncate:V2SI
+ (match_operand:V2DI 1 "register_operand"))
+ (match_operand:QI 2 "register_operand")]
+ "TARGET_AVX512VL"
+{
+ operands[0] = adjust_address_nv (operands[0], V2SImode, 0);
+ emit_insn (gen_avx512vl_<code>v2div2si2_mask_store_1 (operands[0],
+ operands[1],
+ operands[2]));
+ DONE;
+})
(define_expand "truncv8div8qi2"
[(set (match_operand:V8QI 0 "register_operand")
@@ -14604,7 +14544,7 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "*avx512f_<code>v8div16qi2_mask_store_1"
+(define_insn "avx512f_<code>v8div16qi2_mask_store_1"
[(set (match_operand:V8QI 0 "memory_operand" "=m")
(vec_merge:V8QI
(any_truncate:V8QI
@@ -14618,31 +14558,19 @@
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn_and_split "avx512f_<code>v8div16qi2_mask_store_2"
- [(set (match_operand:DI 0 "memory_operand")
- (subreg:DI
- (vec_merge:V8QI
- (any_truncate:V8QI
- (match_operand:V8DI 1 "register_operand"))
- (vec_select:V8QI
- (subreg:V16QI
- (vec_concat:V2DI
- (match_dup 0)
- (const_int 0)) 0)
- (parallel [(const_int 0) (const_int 1)
- (const_int 2) (const_int 3)
- (const_int 4) (const_int 5)
- (const_int 6) (const_int 7)]))
- (match_operand:QI 2 "register_operand")) 0))]
- "TARGET_AVX512F && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (vec_merge:V8QI
- (any_truncate:V8QI (match_dup 1))
- (match_dup 0)
- (match_dup 2)))]
- "operands[0] = adjust_address_nv (operands[0], V8QImode, 0);")
+(define_expand "avx512f_<code>v8div16qi2_mask_store_2"
+ [(match_operand:DI 0 "memory_operand")
+ (any_truncate:V8QI
+ (match_operand:V8DI 1 "register_operand"))
+ (match_operand:QI 2 "register_operand")]
+ "TARGET_AVX512F"
+{
+ operands[0] = adjust_address_nv (operands[0], V8QImode, 0);
+ emit_insn (gen_avx512f_<code>v8div16qi2_mask_store_1 (operands[0],
+ operands[1],
+ operands[2]));
+ DONE;
+})
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
diff --git a/gcc/testsuite/gcc.target/i386/pr117318.c
b/gcc/testsuite/gcc.target/i386/pr117318.c
new file mode 100644
index 000000000000..3d316ad04cff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr117318.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O" } */
+
+typedef __attribute__((__vector_size__ (64))) long long V;
+unsigned long long x;
+
+unsigned long long
+foo()
+{
+ __builtin_ia32_pmovusqb512mem_mask (&x, (V){8000000000000000}, 255);
+ return x;
+}
