[gcc(refs/users/meissner/heads/work187)] Use vector pair load/store for memcpy with -mcpu=future

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:e98175b635a332f28ba1dd8e5da67bcec92efcc5

commit e98175b635a332f28ba1dd8e5da67bcec92efcc5
Author: Michael Meissner <meiss...@linux.ibm.com>
Date:   Fri Nov 22 17:49:32 2024 -0500

    Use vector pair load/store for memcpy with -mcpu=future
    
    In the development for the power10 processor, GCC did not enable using the 
load
    vector pair and store vector pair instructions when optimizing things like
    memory copy.  This patch enables using those instructions if -mcpu=future is
    used.
    
    2024-11-22  Michael Meissner  <meiss...@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable 
using
            load vector pair and store vector pair instructions for memory copy
            operations.
            (POWERPC_MASKS): Make the bit for enabling using load vector pair 
and
            store vector pair operations set and reset when the PowerPC 
processor is
            changed.
            * gcc/config/rs6000/rs6000.cc (rs6000_machine_from_flags): Disable
            -mblock-ops-vector-pair from influcing .machine selection.
    
    gcc/testsuite/
    
            * gcc.target/powerpc/future-3.c: New test.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def           |  4 +++-
 gcc/config/rs6000/rs6000.cc                 |  2 +-
 gcc/testsuite/gcc.target/powerpc/future-3.c | 21 +++++++++++++++++++++
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 354c1d8de4f0..2f189dd416ca 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -84,7 +84,8 @@
                              | OPTION_MASK_POWER11)
 
 #define FUTURE_MASKS_SERVER    (POWER11_MASKS_SERVER                   \
-                                | OPTION_MASK_FUTURE)
+                                | OPTION_MASK_FUTURE                   \
+                                | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR)
 
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX    \
@@ -114,6 +115,7 @@
 
 /* Mask of all options to set the default isa flags based on -mcpu=<xxx>.  */
 #define POWERPC_MASKS          (OPTION_MASK_ALTIVEC                    \
+                                | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR    \
                                 | OPTION_MASK_CMPB                     \
                                 | OPTION_MASK_CRYPTO                   \
                                 | OPTION_MASK_DFP                      \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index ab26192b687d..35e42a80ac5c 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5906,7 +5906,7 @@ rs6000_machine_from_flags (void)
 
   /* Disable the flags that should never influence the .machine selection.  */
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
-            | OPTION_MASK_ALTIVEC);
+            | OPTION_MASK_ALTIVEC | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR);
 
   if ((flags & (FUTURE_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
     return "future";
diff --git a/gcc/testsuite/gcc.target/powerpc/future-3.c 
b/gcc/testsuite/gcc.target/powerpc/future-3.c
new file mode 100644
index 000000000000..1cbe9170f121
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-3.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Test to see that memcpy will use load/store vector pair with
+   -mcpu=future.  */
+
+#ifndef SIZE
+#define SIZE 4
+#endif
+
+extern vector double to[SIZE], from[SIZE];
+
+void
+copy (void)
+{
+  __builtin_memcpy (to, from, sizeof (to));
+  return;
+}
+
+/* { dg-final { scan-assembler {\mlxvpx?\M}  } } */
+/* { dg-final { scan-assembler {\mstxvpx?\M} } } */