[gcc r15-6242] arm: [MVE intrinsics] add modes for tuples

[Christophe Lyon via Gcc-cvs]

https://gcc.gnu.org/g:1e52a6a2d44cfa81f80a14360db0687275512ec7

commit r15-6242-g1e52a6a2d44cfa81f80a14360db0687275512ec7
Author: Christophe Lyon <christophe.l...@linaro.org>
Date:   Wed Nov 13 15:28:29 2024 +0000

    arm: [MVE intrinsics] add modes for tuples
    
    Add V2x and V4x modes, like we do on aarch64 for Advanced SIMD
    q-registers.
    
    gcc/ChangeLog:
    
            * config/arm/arm-modes.def (MVE_STRUCT_MODES): New.

Diff:
---
 gcc/config/arm/arm-modes.def | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/gcc/config/arm/arm-modes.def b/gcc/config/arm/arm-modes.def
index 4d592ad3cfb6..4774dfbcd4be 100644
--- a/gcc/config/arm/arm-modes.def
+++ b/gcc/config/arm/arm-modes.def
@@ -105,3 +105,25 @@ INT_MODE (EI, 24);
 INT_MODE (OI, 32);
 INT_MODE (CI, 48);
 INT_MODE (XI, 64);
+
+/* Define MVE modes for structures of 2 and 4 q-registers.  */
+#define MVE_STRUCT_MODES(NVECS, VB, VH, VS, VD)                \
+  VECTOR_MODES_WITH_PREFIX (V##NVECS##x, INT, 16, 3);  \
+  VECTOR_MODES_WITH_PREFIX (V##NVECS##x, FLOAT, 16, 3);        \
+  \
+  ADJUST_NUNITS (VB##QI, NVECS * 16);  \
+  ADJUST_NUNITS (VH##HI, NVECS * 8);   \
+  ADJUST_NUNITS (VS##SI, NVECS * 4);   \
+  ADJUST_NUNITS (VD##DI, NVECS * 2);   \
+  ADJUST_NUNITS (VH##HF, NVECS * 8);   \
+  ADJUST_NUNITS (VS##SF, NVECS * 4);   \
+  \
+  ADJUST_ALIGNMENT (VB##QI, 16); \
+  ADJUST_ALIGNMENT (VH##HI, 16); \
+  ADJUST_ALIGNMENT (VS##SI, 16); \
+  ADJUST_ALIGNMENT (VD##DI, 16); \
+  ADJUST_ALIGNMENT (VH##HF, 16); \
+  ADJUST_ALIGNMENT (VS##SF, 16);
+
+MVE_STRUCT_MODES (2, V2x16, V2x8, V2x4, V2x2)
+MVE_STRUCT_MODES (4, V4x16, V4x8, V4x4, V4x2)