https://gcc.gnu.org/g:24d1832e0d6edce4f6f717135fcec65d6939e199
commit r15-9332-g24d1832e0d6edce4f6f717135fcec65d6939e199
Author: Pan Li <pan2...@intel.com>
Date: Wed Apr 9 19:08:21 2025 +0800
Revert "RISC-V: Refine the testcases for cond_widen_complicate-3"
This reverts commit f70f4b60debce4a223725781d1973c05d8d1dfa9.
Diff:
---
.../rvv/autovec/cond/cond_widen_complicate-3-f16.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3-f32.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3-i16.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3-i32.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3-i8.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3-u16.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3-u32.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3-u8.c | 9 ------
.../rvv/autovec/cond/cond_widen_complicate-3.c | 36 ++++++++++++++++++++++
.../rvv/autovec/cond/cond_widen_complicate-3.h | 21 -------------
10 files changed, 36 insertions(+), 93 deletions(-)
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f16.c
deleted file mode 100644
index e4ff3106b0e0..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f16.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d
-mrvv-vector-bits=scalable -ffast-math" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (float, _Float16)
-
-/* { dg-final { scan-assembler-times {\tvfwmul\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f32.c
deleted file mode 100644
index 7d2b44827cdc..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f32.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d
-mrvv-vector-bits=scalable -ffast-math" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (double, float)
-
-/* { dg-final { scan-assembler-times {\tvfwmul\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i16.c
deleted file mode 100644
index dc7e1da76b80..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i16.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d
-mrvv-vector-bits=scalable" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (int32_t, int16_t)
-
-/* { dg-final { scan-assembler-times {\tvwmul\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i32.c
deleted file mode 100644
index de1072f5673f..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i32.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d
-mrvv-vector-bits=scalable" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (int64_t, int32_t)
-
-/* { dg-final { scan-assembler-times {\tvwmul\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i8.c
deleted file mode 100644
index 8de5ef4db0fb..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i8.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d
-mrvv-vector-bits=scalable" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (int16_t, int8_t)
-
-/* { dg-final { scan-assembler-times {\tvwmul\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u16.c
deleted file mode 100644
index a4aafd203d7e..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u16.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d
-mrvv-vector-bits=scalable" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (uint32_t, uint16_t)
-
-/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u32.c
deleted file mode 100644
index 0deeaa08f205..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u32.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d
-mrvv-vector-bits=scalable" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (uint64_t, uint32_t)
-
-/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u8.c
deleted file mode 100644
index a6afcd024c9e..000000000000
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u8.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d
-mrvv-vector-bits=scalable" } */
-
-#include "cond_widen_complicate-3.h"
-
-TEST_TYPE (uint16_t, uint8_t)
-
-/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 1 } } */
-/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c
new file mode 100644
index 000000000000..d02a8e2dbb99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d
-mrvv-vector-bits=scalable -ffast-math" } */
+
+#include <stdint-gcc.h>
+
+#define TEST_TYPE(TYPE1, TYPE2)
\
+ __attribute__ ((noipa)) void vwadd_##TYPE1_##TYPE2 (
\
+ TYPE1 *__restrict dst, TYPE1 *__restrict dst2, TYPE1 *__restrict dst3,
\
+ TYPE1 *__restrict dst4, TYPE2 *__restrict a, TYPE2 *__restrict b,
\
+ TYPE2 *__restrict a2, TYPE2 *__restrict b2, int *__restrict pred, int n)
\
+ {
\
+ for (int i = 0; i < n; i++)
\
+ {
\
+ dst[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b[i] : dst[i]; \
+ dst2[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) b[i] : dst2[i]; \
+ dst3[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) a[i] : dst3[i]; \
+ dst4[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b2[i] : dst4[i]; \
+ }
\
+ }
+
+#define TEST_ALL()
\
+ TEST_TYPE (int16_t, int8_t)
\
+ TEST_TYPE (uint16_t, uint8_t)
\
+ TEST_TYPE (int32_t, int16_t)
\
+ TEST_TYPE (uint32_t, uint16_t)
\
+ TEST_TYPE (int64_t, int32_t)
\
+ TEST_TYPE (uint64_t, uint32_t)
\
+ TEST_TYPE (float, _Float16)
\
+ TEST_TYPE (double, float)
+
+TEST_ALL ()
+
+/* { dg-final { scan-assembler-times {\tvwmul\.vv} 12 } } */
+/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 12 } } */
+/* { dg-final { scan-assembler-times {\tvfwmul\.vv} 8 } } */
+/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.h
deleted file mode 100644
index 974846f2ff36..000000000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.h
+++ /dev/null
@@ -1,21 +0,0 @@
-#ifndef COND_WIDEN_COMPLICATE_3_H
-#define COND_WIDEN_COMPLICATE_3_H
-
-#include <stdint-gcc.h>
-
-#define TEST_TYPE(TYPE1, TYPE2)
\
- __attribute__ ((noipa)) void vwadd_##TYPE1##_##TYPE2 (
\
- TYPE1 *__restrict dst, TYPE1 *__restrict dst2, TYPE1 *__restrict dst3,
\
- TYPE1 *__restrict dst4, TYPE2 *__restrict a, TYPE2 *__restrict b,
\
- TYPE2 *__restrict a2, TYPE2 *__restrict b2, int *__restrict pred, int n)
\
- {
\
- for (int i = 0; i < n; i++)
\
- {
\
- dst[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b[i] : dst[i]; \
- dst2[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) b[i] : dst2[i]; \
- dst3[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) a[i] : dst3[i]; \
- dst4[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b2[i] : dst4[i]; \
- }
\
- }
-
-#endif
