[gcc r15-9511] aarch64: Disable sysreg feature gating

[Alice Carlotti via Gcc-cvs]

https://gcc.gnu.org/g:43cbf049f5b017316f6fb1ea5f95784194323a51

commit r15-9511-g43cbf049f5b017316f6fb1ea5f95784194323a51
Author: Alice Carlotti <alice.carlo...@arm.com>
Date:   Tue Apr 15 17:36:25 2025 +0100

    aarch64: Disable sysreg feature gating
    
    This applies to the sysreg read/write intrinsics __arm_[wr]sr*.  It does
    not depend on changes to Binutils, because GCC converts recognised
    sysreg names to an encoding based form, which is already ungated in 
Binutils.
    
    We have, however, agreed to make an equivalent change in Binutils (which
    would then disable feature gating for sysreg accesses in inline
    assembly), but this has not yet been posted upstream.
    
    In the future we may introduce a new flag to renable some checking,
    but these checks could not be comprehensive because many system
    registers depend on architecture features that don't have corresponding
    GCC/GAS --march options.  This would also depend on addressing numerous
    inconsistencies in the existing list of sysreg feature dependencies.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64.cc
            (aarch64_valid_sysreg_name_p): Remove feature check.
            (aarch64_retrieve_sysreg): Ditto.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/aarch64/acle/rwsr-ungated.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64.cc                        |  4 ----
 gcc/testsuite/gcc.target/aarch64/acle/rwsr-ungated.c | 13 +++++++++++++
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 4e801146c60a..433ec975d7e4 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -31073,8 +31073,6 @@ aarch64_valid_sysreg_name_p (const char *regname)
   const sysreg_t *sysreg = aarch64_lookup_sysreg_map (regname);
   if (sysreg == NULL)
     return aarch64_is_implem_def_reg (regname);
-  if (sysreg->arch_reqs)
-    return bool (aarch64_isa_flags & sysreg->arch_reqs);
   return true;
 }
 
@@ -31098,8 +31096,6 @@ aarch64_retrieve_sysreg (const char *regname, bool 
write_p, bool is128op)
   if ((write_p && (sysreg->properties & F_REG_READ))
       || (!write_p && (sysreg->properties & F_REG_WRITE)))
     return NULL;
-  if ((~aarch64_isa_flags & sysreg->arch_reqs) != 0)
-    return NULL;
   return sysreg->encoding;
 }
 
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/rwsr-ungated.c 
b/gcc/testsuite/gcc.target/aarch64/acle/rwsr-ungated.c
new file mode 100644
index 000000000000..d67a42673733
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/rwsr-ungated.c
@@ -0,0 +1,13 @@
+/* Test that __arm_[r,w]sr intrinsics aren't gated (by default).  */
+
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-a" } */
+
+#include <arm_acle.h>
+
+uint64_t
+foo (uint64_t a)
+{
+  __arm_wsr64 ("zcr_el1", a);
+  return __arm_rsr64 ("smcr_el1");
+}