https://gcc.gnu.org/g:14fe427ab5eec008e12e7aa275caf046c0588c68

commit r14-11634-g14fe427ab5eec008e12e7aa275caf046c0588c68
Author: Richard Sandiford <richard.sandif...@arm.com>
Date:   Wed Apr 16 13:20:27 2025 +0100

    aarch64: Fix invalid subregs in xorsign [PR118501]
    
    In the testcase, we try to use xorsign on:
    
       (subreg:DF (reg:TI R) 8)
    
    i.e. the highpart of the TI.  xorsign wants to take a V2DF
    paradoxical subreg of this, which is rightly rejected as a direct
    operation.  In cases like this, we need to force the highpart into
    a fresh register first.
    
    gcc/
            PR target/118501
            * config/aarch64/aarch64.md (@xorsign<mode>3): Use
            force_lowpart_subreg.
    
    gcc/testsuite/
            PR target/118501
            * gcc.c-torture/compile/pr118501.c: New test.
    
    (cherry picked from commit 6612b8e55471fabd2071a9637a06d3ffce2b05a6)

Diff:
---
 gcc/config/aarch64/aarch64.md                  | 4 ++--
 gcc/testsuite/gcc.c-torture/compile/pr118501.c | 6 ++++++
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 1be8322c4ee0..95577b325cef 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -7255,8 +7255,8 @@
   "TARGET_SIMD"
 {
   rtx tmp = gen_reg_rtx (<VCONQ>mode);
-  rtx op1 = lowpart_subreg (<VCONQ>mode, operands[1], <MODE>mode);
-  rtx op2 = lowpart_subreg (<VCONQ>mode, operands[2], <MODE>mode);
+  rtx op1 = force_lowpart_subreg (<VCONQ>mode, operands[1], <MODE>mode);
+  rtx op2 = force_lowpart_subreg (<VCONQ>mode, operands[2], <MODE>mode);
   emit_insn (gen_xorsign3 (<VCONQ>mode, tmp, op1, op2));
   emit_move_insn (operands[0],
                  lowpart_subreg (<MODE>mode, tmp, <VCONQ>mode));
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr118501.c 
b/gcc/testsuite/gcc.c-torture/compile/pr118501.c
new file mode 100644
index 000000000000..064b76208ca9
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr118501.c
@@ -0,0 +1,6 @@
+struct s1 {
+  double data[2];
+};
+double h(double t, struct s1 z_) {
+  return z_.data[1] * __builtin_copysign(1.0, t);
+}

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