https://gcc.gnu.org/g:a6ec398042c6054cbf2c08b646df98b63a9418d5

commit r16-776-ga6ec398042c6054cbf2c08b646df98b63a9418d5
Author: Richard Sandiford <richard.sandif...@arm.com>
Date:   Wed May 21 10:01:26 2025 +0100

    nds32: Avoid accessing beyond the operands[] array
    
    This pattern used operands[2] to hold the shift amount, even though
    the pattern doesn't have an operand 2 (not even as a match_dup).
    This caused a build failure with -Werror:
    
      array subscript 2 is above array bounds of ‘rtx_def* [2]’
    
    gcc/
            PR target/100837
            * config/nds32/nds32-intrinsic.md (unspec_get_pending_int): Use
            a local variable instead of operands[2].

Diff:
---
 gcc/config/nds32/nds32-intrinsic.md | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/gcc/config/nds32/nds32-intrinsic.md 
b/gcc/config/nds32/nds32-intrinsic.md
index e05dce105099..85acea330f07 100644
--- a/gcc/config/nds32/nds32-intrinsic.md
+++ b/gcc/config/nds32/nds32-intrinsic.md
@@ -333,30 +333,31 @@
   ""
 {
   rtx system_reg = NULL_RTX;
+  rtx shift_amt = NULL_RTX;
 
   /* Set system register form nds32_intrinsic_register_names[].  */
   if ((INTVAL (operands[1]) >= NDS32_INT_H0)
       && (INTVAL (operands[1]) <= NDS32_INT_H15))
     {
       system_reg = GEN_INT (__NDS32_REG_INT_PEND__);
-      operands[2] = GEN_INT (31 - INTVAL (operands[1]));
+      shift_amt = GEN_INT (31 - INTVAL (operands[1]));
     }
   else if (INTVAL (operands[1]) == NDS32_INT_SWI)
     {
       system_reg = GEN_INT (__NDS32_REG_INT_PEND__);
-      operands[2] = GEN_INT (15);
+      shift_amt = GEN_INT (15);
     }
   else if ((INTVAL (operands[1]) >= NDS32_INT_H16)
           && (INTVAL (operands[1]) <= NDS32_INT_H31))
     {
       system_reg = GEN_INT (__NDS32_REG_INT_PEND2__);
-      operands[2] = GEN_INT (31 - INTVAL (operands[1]));
+      shift_amt = GEN_INT (31 - INTVAL (operands[1]));
     }
   else if ((INTVAL (operands[1]) >= NDS32_INT_H32)
           && (INTVAL (operands[1]) <= NDS32_INT_H63))
     {
       system_reg = GEN_INT (__NDS32_REG_INT_PEND3__);
-      operands[2] = GEN_INT (31 - (INTVAL (operands[1]) - 32));
+      shift_amt = GEN_INT (31 - (INTVAL (operands[1]) - 32));
     }
   else
     error ("%<get_pending_int%> not support %<NDS32_INT_ALZ%>,"
@@ -366,7 +367,7 @@
   if (system_reg != NULL_RTX)
     {
       emit_insn (gen_unspec_volatile_mfsr (operands[0], system_reg));
-      emit_insn (gen_ashlsi3 (operands[0], operands[0], operands[2]));
+      emit_insn (gen_ashlsi3 (operands[0], operands[0], shift_amt));
       emit_insn (gen_lshrsi3 (operands[0], operands[0], GEN_INT (31)));
       emit_insn (gen_unspec_dsb ());
     }

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