https://gcc.gnu.org/g:24cbcc49277a0ac40fc2d82831f6db5e8d6d890d

commit r16-1125-g24cbcc49277a0ac40fc2d82831f6db5e8d6d890d
Author: Hu, Lin1 <lin1...@intel.com>
Date:   Tue May 27 19:09:04 2025 +0800

    i386: Fix vmovvdup's mem attribute
    
    Some vmovvdup pattern's type attribute is sselog1 and then mem attribute is
    both. Modify type attribute according to other patterns about vmovvdup.
    
    gcc/ChangeLog:
    
            * config/i386/sse.md
            (avx512f_movddup512<mask_name>): Change sselog1 to ssemov.
            (avx_movddup256<mask_name>): Ditto.
            (*vec_dupv2di): Change alternative 4's type attribute from sselog1
            to ssemov.

Diff:
---
 gcc/config/i386/sse.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index aea5e2cad7e1..c40b0fd49978 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13418,7 +13418,7 @@
                     (const_int 6) (const_int 14)])))]
   "TARGET_AVX512F"
   "vmovddup\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
-  [(set_attr "type" "sselog1")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "V8DF")])
 
@@ -13449,7 +13449,7 @@
                     (const_int 2) (const_int 6)])))]
   "TARGET_AVX && <mask_avx512vl_condition>"
   "vmovddup\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
-  [(set_attr "type" "sselog1")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix" "<mask_prefix>")
    (set_attr "mode" "V4DF")])
 
@@ -27839,7 +27839,7 @@
    %vmovddup\t{%1, %0|%0, %1}
    movlhps\t%0, %0"
   [(set_attr "isa" "sse2_noavx,avx,avx512f,sse3,noavx")
-   (set_attr "type" "sselog1,sselog1,ssemov,sselog1,ssemov")
+   (set_attr "type" "sselog1,sselog1,ssemov,ssemov,ssemov")
    (set_attr "prefix" "orig,maybe_evex,evex,maybe_vex,orig")
    (set (attr "mode")
        (cond [(and (eq_attr "alternative" "2")

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