https://gcc.gnu.org/g:af3de9e20968c8fb0f5b950e4b0753a28a1d1dc3
commit r16-1343-gaf3de9e20968c8fb0f5b950e4b0753a28a1d1dc3 Author: Jeff Law <j...@ventanamicro.com> Date: Mon Jun 9 06:55:21 2025 -0600 [RISC-V] Enable more if-conversion on RISC-V Another czero related adjustment. This time in costing of conditional move sequences. Essentially a copy from a promoted subreg can and should be ignored from a costing standpoint. We had some code to do this, but its conditions were too strict. No real surprises evaluating spec. This should be a minor, but probably not measurable improvement in x264 and xz. It is if-converting more in some particular harm to hot routines, but not necessarily in the hot parts of those routines. It's been tested on riscv32-elf and riscv64-elf. Versions of this have bootstrapped and regression tested as well, though perhaps not this exact version. Waiting on pre-commit testing. gcc/ * config/riscv/riscv.cc (riscv_noce_conversion_profitable_p): Relax condition for adjustments due to copies from promoted SUBREGs. Diff: --- gcc/config/riscv/riscv.cc | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index f98072cca7ce..14ac2f3cdbc1 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -4609,16 +4609,14 @@ riscv_noce_conversion_profitable_p (rtx_insn *seq, rtx dest = SET_DEST (x); - /* Do something similar for the moves that are likely to + /* Do something similar for the moves that are likely to turn into NOP moves by the time the register allocator is - done. These are also side effects of how our sCC expanders - work. We'll want to check and update LAST_DEST here too. */ - if (last_dest - && REG_P (dest) + done. We don't require src to be something set in this + sequence, just a promoted SUBREG. */ + if (REG_P (dest) && GET_MODE (dest) == SImode && SUBREG_P (src) - && SUBREG_PROMOTED_VAR_P (src) - && REGNO (SUBREG_REG (src)) == REGNO (last_dest)) + && SUBREG_PROMOTED_VAR_P (src)) { riscv_if_info.original_cost += COSTS_N_INSNS (1); riscv_if_info.max_seq_cost += COSTS_N_INSNS (1);