https://gcc.gnu.org/g:8bfffbaaf94907d12c535486cd9d8a3a53a1aea9
commit 8bfffbaaf94907d12c535486cd9d8a3a53a1aea9
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue Jun 10 16:14:34 2025 -0400
PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations
2025-06-10 Michael Meissner <meiss...@linux.ibm.com>
gcc/
PR target/117251
* config/rs6000/fusion.md: Regenerate.
* config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to
generate vector/vector andc/andc fusion if XXEVAL is supported.
Diff:
---
gcc/config/rs6000/fusion.md | 15 +++++++++------
gcc/config/rs6000/genfusion.pl | 1 +
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index e27f05f85f12..810d97963fb9 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -2054,20 +2054,23 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vandc
(define_insn "*fuse_vandc_vandc"
- [(set (match_operand:VM 3 "altivec_register_operand" "=&0,&1,&v,v")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand"
"v,v,v,v"))
- (match_operand:VM 1 "altivec_register_operand"
"v,v,v,v"))
- (not:VM (match_operand:VM 2 "altivec_register_operand"
"v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (not:VM (match_operand:VM 2 "vector_fusion_operand"
"v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vandc %3,%1,%0\;vandc %3,%3,%2
vandc %3,%1,%0\;vandc %3,%3,%2
vandc %3,%1,%0\;vandc %3,%3,%2
+ xxeval %x3,%x2,%x1,%x0,13
vandc %4,%1,%0\;vandc %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
- (set_attr "length" "8")])
+ (set_attr "length" "8")
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vandc
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index a3cc8b121eab..929257d6c03e 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -222,6 +222,7 @@ sub gen_logical_addsubf
"vnor_vand" => 8,
"veqv_vand" => 9,
"vorc_vand" => 11,
+ "vandc_vandc" => 13,
);
KIND: foreach $kind ('scalar','vector') {
