https://gcc.gnu.org/g:d8d5e2a8031e74f08f61ccdd727476f97940c5a6

commit r16-1917-gd8d5e2a8031e74f08f61ccdd727476f97940c5a6
Author: H.J. Lu <hjl.to...@gmail.com>
Date:   Thu Jul 3 10:54:39 2025 +0800

    x86-64: Add RDI clobber to 64-bit dynamic TLS patterns
    
    *tls_global_dynamic_64_largepic, *tls_local_dynamic_64_<mode> and
    *tls_local_dynamic_base_64_largepic use RDI as the __tls_get_addr
    argument.  Add RDI clobber to these patterns to show it.
    
    gcc/
    
            PR target/120908
            * config/i386/i386.cc (legitimize_tls_address): Pass RDI to
            gen_tls_local_dynamic_64.
            * config/i386/i386.md (*tls_global_dynamic_64_largepic): Add
            RDI clobber and use it to generate LEA.
            (*tls_local_dynamic_64_<mode>): Likewise.
            (*tls_local_dynamic_base_64_largepic): Likewise.
            (@tls_local_dynamic_64_<mode>): Add a clobber.
    
    gcc/testsuite/
    
            PR target/120908
            * gcc.target/i386/pr120908.c: New test.
    
    Signed-off-by: H.J. Lu <hjl.to...@gmail.com>

Diff:
---
 gcc/config/i386/i386.cc                  |  3 ++-
 gcc/config/i386/i386.md                  | 18 +++++++++++-------
 gcc/testsuite/gcc.target/i386/pr120908.c | 16 ++++++++++++++++
 3 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 9657c6ae31fa..24aedc136a69 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -12616,12 +12616,13 @@ legitimize_tls_address (rtx x, enum tls_model model, 
bool for_mov)
          if (TARGET_64BIT)
            {
              rtx rax = gen_rtx_REG (Pmode, AX_REG);
+             rtx rdi = gen_rtx_REG (Pmode, DI_REG);
              rtx_insn *insns;
              rtx eqv;
 
              start_sequence ();
              emit_call_insn
-               (gen_tls_local_dynamic_base_64 (Pmode, rax, caddr));
+               (gen_tls_local_dynamic_base_64 (Pmode, rax, caddr, rdi));
              insns = end_sequence ();
 
              /* Attach a unique REG_EQUAL, to allow the RTL optimizers to
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 370e79bb511d..21b9f5ccd7a1 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -23243,14 +23243,15 @@
         (match_operand 4)))
    (unspec:DI [(match_operand 1 "tls_symbolic_operand")
               (reg:DI SP_REG)]
-             UNSPEC_TLS_GD)]
+             UNSPEC_TLS_GD)
+   (clobber (match_operand:DI 5 "register_operand" "=D"))]
   "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
    && GET_CODE (operands[3]) == CONST
    && GET_CODE (XEXP (operands[3], 0)) == UNSPEC
    && XINT (XEXP (operands[3], 0), 1) == UNSPEC_PLTOFF"
 {
   output_asm_insn
-    ("lea{q}\t{%E1@tlsgd(%%rip), %%rdi|rdi, %E1@tlsgd[rip]}", operands);
+    ("lea{q}\t{%E1@tlsgd(%%rip), %5|%5, %E1@tlsgd[rip]}", operands);
   output_asm_insn ("movabs{q}\t{%3, %%rax|rax, %3}", operands);
   output_asm_insn ("add{q}\t{%2, %%rax|rax, %2}", operands);
   return "call\t{*%%rax|rax}";
@@ -23318,11 +23319,12 @@
        (call:P
         (mem:QI (match_operand 1 "constant_call_address_operand" "Bz"))
         (match_operand 2)))
-   (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)]
+   (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)
+   (clobber (match_operand:P 3 "register_operand" "=D"))]
   "TARGET_64BIT"
 {
   output_asm_insn
-    ("lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}", operands);
+    ("lea{q}\t{%&@tlsld(%%rip), %q3|%q3, %&@tlsld[rip]}", operands);
   if (TARGET_SUN_TLS)
     return "call\t%p1@plt";
   if (flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
@@ -23338,14 +23340,15 @@
         (mem:QI (plus:DI (match_operand:DI 1 "register_operand" "b")
                          (match_operand:DI 2 "immediate_operand" "i")))
         (match_operand 3)))
-   (unspec:DI [(reg:DI SP_REG)] UNSPEC_TLS_LD_BASE)]
+   (unspec:DI [(reg:DI SP_REG)] UNSPEC_TLS_LD_BASE)
+   (clobber (match_operand:DI 4 "register_operand" "=D"))]
   "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
    && GET_CODE (operands[2]) == CONST
    && GET_CODE (XEXP (operands[2], 0)) == UNSPEC
    && XINT (XEXP (operands[2], 0), 1) == UNSPEC_PLTOFF"
 {
   output_asm_insn
-    ("lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}", operands);
+    ("lea{q}\t{%&@tlsld(%%rip), %4|%4, %&@tlsld[rip]}", operands);
   output_asm_insn ("movabs{q}\t{%2, %%rax|rax, %2}", operands);
   output_asm_insn ("add{q}\t{%1, %%rax|rax, %1}", operands);
   return "call\t{*%%rax|rax}";
@@ -23359,7 +23362,8 @@
           (call:P
            (mem:QI (match_operand 1))
            (const_int 0)))
-      (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)])]
+      (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)
+      (clobber (match_operand:P 2 "register_operand"))])]
   "TARGET_64BIT"
   "ix86_tls_descriptor_calls_expanded_in_cfun = true;")
 
diff --git a/gcc/testsuite/gcc.target/i386/pr120908.c 
b/gcc/testsuite/gcc.target/i386/pr120908.c
new file mode 100644
index 000000000000..10e5a46d8d4e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr120908.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { lp64 && fpic } } } */
+/* { dg-options "-O2 -fpic -mtls-dialect=gnu -mcmodel=large" } */
+
+extern __thread long bar1;
+long *
+foo1 (void)
+{
+  return &bar1;
+}
+
+static __thread long bar2;
+long *
+foo2 (void)
+{
+  return &bar2;
+}

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