https://gcc.gnu.org/g:d0e62f3783f34c6591628ca771f46fd30d8b4b7b

commit r16-2721-gd0e62f3783f34c6591628ca771f46fd30d8b4b7b
Author: Georg-Johann Lay <a...@gjlay.de>
Date:   Fri Aug 1 12:55:00 2025 +0200

    AVR: Add avr.cc::avr_add_ccclobber().
    
    gcc/
            * config/avr/avr.cc (avr_add_ccclobber): New function.
            * config/avr/avr-protos.h (avr_add_ccclobber): New proto.
            (DONE_ADD_CCC): New define.

Diff:
---
 gcc/config/avr/avr-protos.h |  2 ++
 gcc/config/avr/avr.cc       | 23 +++++++++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h
index 37911e7d275d..9aa00d39f1df 100644
--- a/gcc/config/avr/avr-protos.h
+++ b/gcc/config/avr/avr-protos.h
@@ -168,6 +168,8 @@ regmask (machine_mode mode, unsigned regno)
 
 extern void avr_fix_inputs (rtx*, unsigned, unsigned);
 extern bool avr_emit3_fix_outputs (rtx (*)(rtx,rtx,rtx), rtx*, unsigned, 
unsigned);
+extern rtx avr_add_ccclobber (rtx_insn *);
+#define DONE_ADD_CCC emit (avr_add_ccclobber (curr_insn)); DONE;
 
 extern rtx lpm_reg_rtx;
 extern rtx lpm_addr_reg_rtx;
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index 1fb59b624de7..2afea952f087 100644
--- a/gcc/config/avr/avr.cc
+++ b/gcc/config/avr/avr.cc
@@ -411,6 +411,29 @@ avr_to_int_mode (rtx x)
 }
 
 
+/* Return the pattern of INSN, but with added (clobber (reg:CC REG_CC)).
+   The pattern of INSN must be a PARALLEL or a SET.  INSN is unchanged.  */
+
+rtx
+avr_add_ccclobber (rtx_insn *insn)
+{
+  rtx pat = PATTERN (insn);
+  gcc_assert (GET_CODE (pat) == SET || GET_CODE (pat) == PARALLEL);
+
+  int newlen = GET_CODE (pat) == SET ? 2 : 1 + XVECLEN (pat, 0);
+  rtx newpat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (newlen));
+  rtx elt0 = GET_CODE (pat) == SET ? pat : XVECEXP (pat, 0, 0);
+
+  XVECEXP (newpat, 0, 0) = copy_rtx (elt0);
+  XVECEXP (newpat, 0, newlen - 1) = gen_rtx_CLOBBER (VOIDmode, cc_reg_rtx);
+
+  for (int i = 1; i < newlen - 1; ++i)
+    XVECEXP (newpat, 0, i) = copy_rtx (XVECEXP (pat, 0, i));
+
+  return newpat;
+}
+
+
 /* Return true if hard register REG supports the ADIW and SBIW instructions.  
*/
 
 bool

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