https://gcc.gnu.org/g:06e6154893c974c9832821b1f3ee6c7d71bdd0a2
commit r16-3347-g06e6154893c974c9832821b1f3ee6c7d71bdd0a2
Author: Pan Li <pan2...@intel.com>
Date: Wed Aug 13 14:01:20 2025 +0800
RISC-V: Add testcase for scalar unsigned SAT_MUL form 3
Add run and asm check test cases for scalar unsigned SAT_MUL form 3.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_mul-4-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.rv32.c: New
test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.rv32.c: New
test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.rv32.c: New test.
Signed-off-by: Pan Li <pan2...@intel.com>
Diff:
---
gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u16-from-u128.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u16-from-u32.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.rv32.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u32-from-u128.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.rv32.c | 13 +++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u64-from-u128.c | 13 +++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u8-from-u128.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u8-from-u16.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u8-from-u32.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.rv32.c | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u128.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u32.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-4-u16-from-u64.rv32.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u128.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-4-u32-from-u64.rv32.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u64-from-u128.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u128.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u16.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u32.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-4-u8-from-u64.rv32.c | 16 ++++++++++++++++
27 files changed, 382 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index d1dfd126ba01..8ef50e9c6b6e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -708,4 +708,20 @@ sat_u_mul_##T##_fmt_2 (T a, T b) \
#define RUN_SAT_U_MUL_FMT_2(T, a, b) sat_u_mul_##T##_fmt_2 (a, b)
#define RUN_SAT_U_MUL_FMT_2_WRAP(T, a, b) RUN_SAT_U_MUL_FMT_2(T, a, b)
+#define DEF_SAT_U_MUL_FMT_3(NT, WT) \
+NT __attribute__((noinline)) \
+sat_u_mul_##NT##_from_##WT##_fmt_3 (NT a, NT b) \
+{ \
+ WT x = (WT)a * (WT)b; \
+ if ((x >> sizeof(a) * 8) == 0) \
+ return (NT)x; \
+ else \
+ return (NT)-1; \
+}
+
+#define DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT) DEF_SAT_U_MUL_FMT_3(NT, WT)
+#define RUN_SAT_U_MUL_FMT_3(NT, WT, a, b) \
+ sat_u_mul_##NT##_from_##WT##_fmt_3 (a, b)
+#define RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, a, b) RUN_SAT_U_MUL_FMT_3(NT, WT, a,
b)
+
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u128.c
new file mode 100644
index 000000000000..10937010032f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u128.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u32.c
new file mode 100644
index 000000000000..c7bff5817a28
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u32.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint32_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.c
new file mode 100644
index 000000000000..13b13efd95ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.rv32.c
new file mode 100644
index 000000000000..b1f7d7af9934
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u16-from-u64.rv32.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u128.c
new file mode 100644
index 000000000000..0775bb782c64
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u128.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.c
new file mode 100644
index 000000000000..0cbd4e4c1dc2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.rv32.c
new file mode 100644
index 000000000000..99d15b4fb18f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u32-from-u64.rv32.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
+/* { dg-final { scan-assembler-times "mulhu" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u64-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u64-from-u128.c
new file mode 100644
index 000000000000..70b13893e981
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u64-from-u128.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint64_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
+/* { dg-final { scan-assembler-times "mulhu" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u128.c
new file mode 100644
index 000000000000..4474eb709fee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u128.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u16.c
new file mode 100644
index 000000000000..eef6490f10d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u16.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint16_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u32.c
new file mode 100644
index 000000000000..8e839c9c98c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u32.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint32_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.c
new file mode 100644
index 000000000000..81a3a24c091f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.rv32.c
new file mode 100644
index 000000000000..40bfcefc2d0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-4-u8-from-u64.rv32.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u128.c
new file mode 100644
index 000000000000..561ee2158085
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u32.c
new file mode 100644
index 000000000000..e49198922afc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint32_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.c
new file mode 100644
index 000000000000..14c6ae552e10
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.rv32.c
new file mode 100644
index 000000000000..35eabc8bb9ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u16-from-u64.rv32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u128.c
new file mode 100644
index 000000000000..d2bf07340a19
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint32_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.c
new file mode 100644
index 000000000000..74c63fd0237e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.rv32.c
new file mode 100644
index 000000000000..015f03897af9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u32-from-u64.rv32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u64-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u64-from-u128.c
new file mode 100644
index 000000000000..77bfce8fe94c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u64-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint64_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u128.c
new file mode 100644
index 000000000000..3c840678d7ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u16.c
new file mode 100644
index 000000000000..7b2bd715090a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint16_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u32.c
new file mode 100644
index 000000000000..abfa9656d9a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint32_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.c
new file mode 100644
index 000000000000..74c63fd0237e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.rv32.c
new file mode 100644
index 000000000000..015f03897af9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-4-u8-from-u64.rv32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_3_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_3_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
