https://gcc.gnu.org/g:64932714a0786c6ba164cff3468f633cc67b23f5

commit r16-3363-g64932714a0786c6ba164cff3468f633cc67b23f5
Author: Xi Ruoyao <xry...@xry111.site>
Date:   Fri Aug 22 21:00:53 2025 +0800

    LoongArch: Fix ICE in highway-1.3.0 testsuite [PR121634]
    
    I can't believe I made such a stupid pasto and the regression test
    didn't detect anything wrong.
    
            PR target/121634
    
    gcc/
    
            * config/loongarch/simd.md (simd_maddw_evod_<mode>_<su>): Use
            WVEC_HALF instead of WVEC for the mode of the sign_extend for
            the rhs of multiplication.
    
    gcc/testsuite/
    
            * gcc.target/loongarch/pr121634.c: New test.

Diff:
---
 gcc/config/loongarch/simd.md                  |  2 +-
 gcc/testsuite/gcc.target/loongarch/pr121634.c | 15 +++++++++++++++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/gcc/config/loongarch/simd.md b/gcc/config/loongarch/simd.md
index dd17cd13fc52..4156b269f9ad 100644
--- a/gcc/config/loongarch/simd.md
+++ b/gcc/config/loongarch/simd.md
@@ -773,7 +773,7 @@
              (vec_select:<VEC_HALF>
                (match_operand:IVEC 2 "register_operand" "f")
                (match_operand:IVEC 4 "vect_par_cnst_even_or_odd_half")))
-           (any_extend:<WVEC>
+           (any_extend:<WVEC_HALF>
              (vec_select:<VEC_HALF>
                (match_operand:IVEC 3 "register_operand" "f")
                (match_dup 4))))
diff --git a/gcc/testsuite/gcc.target/loongarch/pr121634.c 
b/gcc/testsuite/gcc.target/loongarch/pr121634.c
new file mode 100644
index 000000000000..325173ad798f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/pr121634.c
@@ -0,0 +1,15 @@
+/* PR target/121634: ICE in highway-1.3.0 testsuite */
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=la464 -mabi=lp64d" } */
+
+typedef short v8i16 __attribute__ ((vector_size (16)));
+typedef int v4i32 __attribute__ ((vector_size (16)));
+typedef long __m128i __attribute__ ((__vector_size__ (16)));
+__m128i x, y;
+
+__m128i
+WidenMulPairwiseAdd (__m128i a, __m128i b)
+{
+  y = (__m128i)__builtin_lsx_vmaddwod_w_h ((v4i32)x, (v8i16){}, (v8i16){});
+  return y;
+}

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