https://gcc.gnu.org/g:06d5889de1dc996b76a27dd154dd6fea3967b355

commit r16-3403-g06d5889de1dc996b76a27dd154dd6fea3967b355
Author: Jeff Law <j...@ventanamicro.com>
Date:   Tue Aug 26 16:50:02 2025 -0600

    [committed] RISC-V Testsuite hygiene
    
    Shreya and I were working through some testsuite failures and noticed that 
many
    of the current failures on the pioneer were just silly.  We have tests that
    expect to see full architecture strings in their expected output when the 
bulk
    (some might say all) of the architecture string is irrelevant.
    
    Worse yet, we'd have different matching lines.  ie we'd have one that would
    machine rv64gc_blah_blah and another for rv64imfa_blah_blah.  Judicious
    wildcard usage cleans this up considerably.
    
    This fixes ~80 failures in the riscv.exp testsuite. Pushing to the trunk as
    it's happy on the pioneer native, riscv32-elf and riscv64-elf.
    
    gcc/testsuite/
            * gcc.target/riscv/arch-25.c: Use wildcards to simplify/eliminate
            dg-error directives.
            * gcc.target/riscv/arch-ss-2.c: Similarly.
            * gcc.target/riscv/arch-zilsd-2.c: Similarly.
            * gcc.target/riscv/arch-zilsd-3.c: Similarly.

Diff:
---
 gcc/testsuite/gcc.target/riscv/arch-25.c      |  3 +--
 gcc/testsuite/gcc.target/riscv/arch-ss-2.c    | 15 +++++----------
 gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c |  3 +--
 gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c |  6 ++----
 4 files changed, 9 insertions(+), 18 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/arch-25.c 
b/gcc/testsuite/gcc.target/riscv/arch-25.c
index 9201883dfb31..ca4d0ee9c3da 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-25.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-25.c
@@ -1,5 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64i_zcf -mabi=lp64" } */
 int foo() {}
-/* { dg-error "'-march=rv64i_zcf': zcf extension supports in rv32 only" "" { 
target *-*-* } 0 } */
-/* { dg-error "'-march=rv64ic_zca_zcf': zcf extension supports in rv32 only" 
"" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv64.*zcf': zcf extension supports in rv32 only" "" { 
target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/riscv/arch-ss-2.c 
b/gcc/testsuite/gcc.target/riscv/arch-ss-2.c
index f1d7724fcee0..457063b5b384 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-ss-2.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-ss-2.c
@@ -3,13 +3,8 @@
 int foo()
 {
 }
-/* { dg-error "'-march=rv32gc_ssnpm_smnpm_smmpm_sspm_supm': ssnpm extension 
supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error "'-march=rv32gc_ssnpm_smnpm_smmpm_sspm_supm': smnpm extension 
supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error "'-march=rv32gc_ssnpm_smnpm_smmpm_sspm_supm': smmpm extension 
supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error "'-march=rv32gc_ssnpm_smnpm_smmpm_sspm_supm': sspm extension 
supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error "'-march=rv32gc_ssnpm_smnpm_smmpm_sspm_supm': supm extension 
supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv32imafdc_zicsr_zifencei_zmmul_zaamo_zalrsc_zca_zcd_zcf_smmpm_smnpm_ssnpm_sspm_supm':
 ssnpm extension supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv32imafdc_zicsr_zifencei_zmmul_zaamo_zalrsc_zca_zcd_zcf_smmpm_smnpm_ssnpm_sspm_supm':
 smnpm extension supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv32imafdc_zicsr_zifencei_zmmul_zaamo_zalrsc_zca_zcd_zcf_smmpm_smnpm_ssnpm_sspm_supm':
 smmpm extension supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv32imafdc_zicsr_zifencei_zmmul_zaamo_zalrsc_zca_zcd_zcf_smmpm_smnpm_ssnpm_sspm_supm':
 sspm extension supports in rv64 only" "" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv32imafdc_zicsr_zifencei_zmmul_zaamo_zalrsc_zca_zcd_zcf_smmpm_smnpm_ssnpm_sspm_supm':
 supm extension supports in rv64 only" "" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv32.\*ssnpm.*': ssnpm extension supports in rv64 only" 
"" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv32.\*smnpm.*': smnpm extension supports in rv64 only" 
"" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv32.\*smmpm.*': smmpm extension supports in rv64 only" 
"" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv32.\*sspm.*': sspm extension supports in rv64 only" 
"" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv32.\*supm.*': supm extension supports in rv64 only" 
"" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c 
b/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
index 5d6185d0d365..585395e70986 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
@@ -3,5 +3,4 @@
 int foo()
 {
 }
-/* { dg-error "'-march=rv64gc_zilsd': zilsd extension supports in rv32 only" 
"" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv64imafdc_zicsr_zifencei_zilsd_zmmul_zaamo_zalrsc_zca_zcd': zilsd 
extension supports in rv32 only" "" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv64g.*zilsd.*': zilsd extension supports in rv32 only" 
"" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c 
b/gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c
index 3cda12030c9e..3328599c9bc4 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c
@@ -3,7 +3,5 @@
 int foo()
 {
 }
-/* { dg-error "'-march=rv64gc_zclsd': zilsd extension supports in rv32 only" 
"" { target *-*-* } 0 } */
-/* { dg-error "'-march=rv64gc_zclsd': zclsd extension supports in rv32 only" 
"" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv64imafdc_zicsr_zifencei_zilsd_zmmul_zaamo_zalrsc_zca_zcd_zclsd': 
zilsd extension supports in rv32 only" "" { target *-*-* } 0 } */
-/* { dg-error 
"'-march=rv64imafdc_zicsr_zifencei_zilsd_zmmul_zaamo_zalrsc_zca_zcd_zclsd': 
zclsd extension supports in rv32 only" "" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv64.*zclsd.*': zilsd extension supports in rv32 only" 
"" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv64.*zclsd.*': zclsd extension supports in rv32 only" 
"" { target *-*-* } 0 } */

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