[gcc r16-3418] RISC-V: testsuite: Fix vf_vfmul and vf_vfrdiv

[Paul-Antoine Arras via Gcc-cvs]

https://gcc.gnu.org/g:6fd3f8c8bae9eb65b38b28739f8c9dba9026cdf5

commit r16-3418-g6fd3f8c8bae9eb65b38b28739f8c9dba9026cdf5
Author: Paul-Antoine Arras <par...@baylibre.com>
Date:   Wed Aug 27 20:25:57 2025 +0200

    RISC-V: testsuite: Fix vf_vfmul and vf_vfrdiv
    
    Fix type and remove useless DejaGnu directives.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f64.c: Fix type.
            * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f32.c: Remove
            useless dg directives.
            * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f64.c: 
Likewise.

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f64.c | 2 +-
 .../gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f32.c          | 4 ----
 .../gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f64.c          | 4 ----
 3 files changed, 1 insertion(+), 9 deletions(-)

diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f64.c
index 337380a0963b..ec3d56213db0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f64.c
@@ -4,7 +4,7 @@
 #include "vf_binop.h"
 #include "vf_binop_data.h"
 
-#define T    float
+#define T    double
 #define NAME mul
 
 DEF_VF_BINOP_CASE_0_WRAP (T, *, NAME)
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f32.c
index 1ebc9a4441d1..2fda776e4b47 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f32.c
@@ -1,8 +1,4 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-require-effective-target riscv_v_ok } */
-/* { dg-require-effective-target riscv_zvfh_ok } */
-/* { dg-add-options "riscv_v" } */
-/* { dg-add-options "riscv_zvfh" } */
 /* { dg-additional-options "--param=fpr2vr-cost=0" } */
 
 #include "vf_binop.h"
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f64.c
index 53dc9f9f4003..8f2958fcc374 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f64.c
@@ -1,8 +1,4 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-require-effective-target riscv_v_ok } */
-/* { dg-require-effective-target riscv_zvfh_ok } */
-/* { dg-add-options "riscv_v" } */
-/* { dg-add-options "riscv_zvfh" } */
 /* { dg-additional-options "--param=fpr2vr-cost=0" } */
 
 #include "vf_binop.h"