https://gcc.gnu.org/g:239581ebbda4846c409f7c7c42237a7bbae2296c
commit 239581ebbda4846c409f7c7c42237a7bbae2296c Author: Michael Meissner <[email protected]> Date: Sun Sep 21 01:57:56 2025 -0400 Add -mcpu=future support. 2025-09-21 Michael Meissner <[email protected]> gcc/ * config/rs6000/aix71.h (ASM_CPU_SPEC): If -mcpu=future, pass -mfuture to the assembler. * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise. * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise. * config/rs6000/rs6000.c.cc (rs6000_target_modify_macros): If -mcpu=future define _ARCH_FUTURE. * config/rs6000/rs6000-cpus.def (CPU_OPTION_FUTURE_MASK): Add support for -mcpu=future. (CPU_OPTION_FUTURE_ALL_MASKS): Likewise. (future cpu): Likewise. * config/rs6000/rs6000-tables.opt: Regenerate. * config/rs6000/rs6000.cc (power10_cost): Update comment. (rs6000_machine_from_flags): Add support for -mcpu=future. (rs6000_cpu_opt_masks): Likewise. (rs6000_function_specific_save): Likewise. (rs6000_function_specific_restore): Likewise. * config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass -mfuture to the assembler. (TARGET_FUTURE): New macro. gcc/testsuite/ * gcc.target/powerpc/future-1.c: New test. * gcc.target/powerpc/future-2.c: Likewise. Diff: --- gcc/config/rs6000/aix71.h | 1 + gcc/config/rs6000/aix72.h | 1 + gcc/config/rs6000/aix73.h | 1 + gcc/config/rs6000/rs6000-c.cc | 2 ++ gcc/config/rs6000/rs6000-cpus.def | 14 ++++++++++++++ gcc/config/rs6000/rs6000-tables.opt | 11 +++++++---- gcc/config/rs6000/rs6000.cc | 5 ++++- gcc/config/rs6000/rs6000.h | 6 ++++++ gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +++++++++++++ gcc/testsuite/gcc.target/powerpc/future-2.c | 24 ++++++++++++++++++++++++ 10 files changed, 73 insertions(+), 5 deletions(-) diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h index 5423252f7688..7c437be201ec 100644 --- a/gcc/config/rs6000/aix71.h +++ b/gcc/config/rs6000/aix71.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h index fdddc4327963..bab23491debc 100644 --- a/gcc/config/rs6000/aix72.h +++ b/gcc/config/rs6000/aix72.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h index 37c2c081c34a..bcf236665604 100644 --- a/gcc/config/rs6000/aix73.h +++ b/gcc/config/rs6000/aix73.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index 823531d5e5a7..0261f672ef21 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -440,6 +440,8 @@ rs6000_target_modify_macros (bool define_p, rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10"); if ((flags & OPTION_MASK_POWER11) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11"); + if ((cpu_option & CPU_OPTION_FUTURE_MASK) != 0) + rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE"); if ((flags & OPTION_MASK_SOFT_FLOAT) != 0) rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT"); if ((flags & OPTION_MASK_RECIP_PRECISION) != 0) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 9de97cb9c6bd..0d88f12520c8 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -125,6 +125,10 @@ #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \ | OPTION_MASK_POWER11) +/* At the moment, do not define any addition -m<xxx> arguments for -mcpu=future + support. */ +#define FUTURE_MASKS_SERVER POWER11_MASKS_SERVER + /* Flags that need to be turned off if -mno-vsx. */ #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ | OPTION_MASK_FLOAT128_KEYWORD \ @@ -200,6 +204,7 @@ #define CPU_OPTION_POWER9_MASK HOST_WIDE_INT_UC (0x00000004) #define CPU_OPTION_POWER10_MASK HOST_WIDE_INT_UC (0x00000008) #define CPU_OPTION_POWER11_MASK HOST_WIDE_INT_UC (0x00000010) +#define CPU_OPTION_FUTURE_MASK HOST_WIDE_INT_UC (0x00000020) /* Processor ISA mask bits that are set for each processor. */ #define CPU_OPTION_POWER7_ALL_MASKS CPU_OPTION_POWER7_MASK @@ -216,6 +221,9 @@ #define CPU_OPTION_POWER11_ALL_MASKS (CPU_OPTION_POWER11_MASK \ | CPU_OPTION_POWER10_ALL_MASKS) +#define CPU_OPTION_FUTURE_ALL_MASKS (CPU_OPTION_FUTURE_MASK \ + | CPU_OPTION_POWER11_ALL_MASKS) + #endif /* #ifndef CPU_OPTION_POWER7_MASK. */ #endif /* #ifndef ISA_2_1_MASKS. */ @@ -328,6 +336,12 @@ RS6000_CPU_OPTION ("power10", PROCESSOR_POWER10, RS6000_CPU_OPTION ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | POWER11_MASKS_SERVER, CPU_OPTION_POWER11_ALL_MASKS) +/* At the present time, do not define a new processor for -mcpu=future. At + some point, it may be provided, but for now, treat the cpu as being tuned + the same as a power11. */ +RS6000_CPU_OPTION ("future", PROCESSOR_POWER11, + MASK_POWERPC64 | FUTURE_MASKS_SERVER, + CPU_OPTION_FUTURE_ALL_MASKS) RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0) RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64) diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt index f5bbed5ea746..518324e7aead 100644 --- a/gcc/config/rs6000/rs6000-tables.opt +++ b/gcc/config/rs6000/rs6000-tables.opt @@ -189,14 +189,17 @@ EnumValue Enum(rs6000_cpu_opt_value) String(power11) Value(53) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc) Value(54) +Enum(rs6000_cpu_opt_value) String(future) Value(54) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55) +Enum(rs6000_cpu_opt_value) String(powerpc) Value(55) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56) +Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56) EnumValue -Enum(rs6000_cpu_opt_value) String(rs64) Value(57) +Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57) + +EnumValue +Enum(rs6000_cpu_opt_value) String(rs64) Value(58) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index e3fda01c5c9c..0194298f1ab3 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -1066,7 +1066,7 @@ struct processor_costs power9_cost = { COSTS_N_INSNS (3), /* SF->DF convert */ }; -/* Instruction costs on Power10/Power11 processors. */ +/* Instruction costs on Power10/Power11/Future processors. */ static const struct processor_costs power10_cost = { COSTS_N_INSNS (2), /* mulsi */ @@ -5929,6 +5929,8 @@ rs6000_machine_from_flags (void) flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL | OPTION_MASK_ALTIVEC); + if ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0) + return "future"; if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0) return "power11"; if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0) @@ -24550,6 +24552,7 @@ static struct rs6000_cpu_opt_mask const rs6000_cpu_opt_masks[] = { "power9", CPU_OPTION_POWER9_MASK }, { "power10", CPU_OPTION_POWER10_MASK }, { "power11", CPU_OPTION_POWER11_MASK }, + { "future", CPU_OPTION_FUTURE_MASK }, }; /* Option variables that we want to support inside attribute((target)) and diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index db6112a09e11..bcee3e025822 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -101,6 +101,7 @@ you make changes here, make them also there. */ #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpower11; \ mcpu=power10: -mpower10; \ mcpu=power9: -mpower9; \ @@ -555,6 +556,11 @@ extern int rs6000_vector_align[]; #define TARGET_DIRECT_MOVE_64BIT (TARGET_DIRECT_MOVE \ && TARGET_POWERPC64) +/* ISA bits that are set via -mcpu=<xxx>, but that do not have an associated + switch with the option. */ +#define TARGET_FUTURE \ + ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0) + /* Inlining allows targets to define the meanings of bits in target_info field of ipa_fn_summary by itself, the used bits for rs6000 are listed below. */ diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c b/gcc/testsuite/gcc.target/powerpc/future-1.c new file mode 100644 index 000000000000..7bd8e5ddbd00 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/future-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +/* Basic check to see if the compiler supports -mcpu=future and if it defines + _ARCH_FUTURE. */ + +#ifndef _ARCH_FUTURE +#error "-mcpu=future is not supported" +#endif + +void foo (void) +{ +} diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c b/gcc/testsuite/gcc.target/powerpc/future-2.c new file mode 100644 index 000000000000..5552cefa3c2e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/future-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* Check if we can set the future target via a target attribute. */ + +__attribute__((__target__("cpu=power9"))) +void foo_p9 (void) +{ +} + +__attribute__((__target__("cpu=power10"))) +void foo_p10 (void) +{ +} + +__attribute__((__target__("cpu=power11"))) +void foo_p11 (void) +{ +} + +__attribute__((__target__("cpu=future"))) +void foo_future (void) +{ +}
