https://gcc.gnu.org/g:24cc91f5ca8956bfc12a7533b665d9830846110a
commit r16-4437-g24cc91f5ca8956bfc12a7533b665d9830846110a Author: Haochen Jiang <[email protected]> Date: Wed Sep 10 13:42:21 2025 +0800 Initial Wildcat Lake Support Add Wildcat Lake support according to ISE. gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Wildcat Lake. * common/config/i386/i386-common.cc (processor_name): Add Wildcat Lake. * doc/invoke.texi: Ditto. Diff: --- gcc/common/config/i386/cpuinfo.h | 2 ++ gcc/common/config/i386/i386-common.cc | 2 ++ gcc/doc/invoke.texi | 15 ++++++++------- 3 files changed, 12 insertions(+), 7 deletions(-) diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 4efa2c04bccb..9c18c04f353d 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -628,6 +628,8 @@ get_intel_cpu (struct __processor_model *cpu_model, break; case 0xcc: /* Panther Lake. */ + case 0xd5: + /* Wildcat Lake. */ cpu = "pantherlake"; CHECK___builtin_cpu_is ("corei7"); CHECK___builtin_cpu_is ("pantherlake"); diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index d3509e1c5cf8..c71f2c136590 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -2270,6 +2270,8 @@ const pta processor_alias_table[] = M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2}, {"diamondrapids", PROCESSOR_DIAMONDRAPIDS, CPU_HASWELL, PTA_DIAMONDRAPIDS, M_CPU_SUBTYPE (INTEL_COREI7_DIAMONDRAPIDS), P_PROC_AVX10_1}, + {"wildcatlake", PROCESSOR_PANTHERLAKE, CPU_HASWELL, PTA_PANTHERLAKE, + M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a7bfdc568cea..ddbcbf0dddeb 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -35143,13 +35143,14 @@ AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and SM4 instruction set support. @item pantherlake -Intel Panther Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, -XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, -MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, -VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8, -AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and SM4 instruction set -support. +@itemx wildcatlake +Intel Panther Lake/Wildcat Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, +SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, +XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, +CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, +LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, +AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and +SM4 instruction set support. @item sapphirerapids @itemx emeraldrapids
