https://gcc.gnu.org/g:4d0143f2d4c93f6d4667408d63bccd5e4e046572
commit r13-9965-g4d0143f2d4c93f6d4667408d63bccd5e4e046572 Author: Hu, Lin1 <[email protected]> Date: Tue Oct 28 16:11:47 2025 +0800 i386: Support C++ template parameters in AMX intrinsics [PR122446] The AMX intrinsics previously used string concatenation with the '#' operator to construct register names, which prevented their use with C++ template non-type parameters. This patch converts all AMX intrinsics to use inline assembly constraints with the %c format specifier. And Intel style registers also have % prefix, update Intel syntax to use plain register names without % preifx. gcc/ChangeLog: PR target/122446 * config/i386/amxbf16intrin.h (_tile_dpbf16ps_internal): Input register name by inline asm %c[...], and remove %% before tmm from intel side. * config/i386/amxcomplexintrin.h (_tile_cmmimfp16ps_internal): Ditto (_tile_cmmrlfp16ps_internal): Ditto (_tile_cmmimfp16ps): Ditto (_tile_cmmrlfp16ps): Ditto * config/i386/amxfp16intrin.h (_tile_dpfp16ps_internal): Ditto (_tile_dpfp16ps): Ditto * config/i386/amxint8intrin.h (_tile_int8_dp_internal): Ditto * config/i386/amxtileintrin.h (_tile_loadd): Ditto (_tile_loadd_internal): Ditto (_tile_stream_loadd): Ditto (_tile_stream_loadd_internal): Ditto (_tile_stored): Ditto (_tile_stored_internal): Ditto (_tile_zero): Ditto (_tile_zero_internal): Ditto gcc/testsuite/ChangeLog: PR target/122446 * gcc.target/i386/amxbf16-asmintel-1.c: Modify dg-final to check intel form. * gcc.target/i386/amxcomplex-asmintel-1.c: Ditto. * gcc.target/i386/amxfp16-asmintel-1.c: Ditto. * gcc.target/i386/amxint8-asmintel-1.c: Ditto. * gcc.target/i386/amxtile-asmintel-1.c: Ditto. * g++.target/i386/pr122446-1.C: New test. * g++.target/i386/pr122446-amxbf16.C: Ditto. * g++.target/i386/pr122446-amxcomplex.C: Ditto. * g++.target/i386/pr122446-amxfp16.C: Ditto. * g++.target/i386/pr122446-amxint8.C: Ditto. * g++.target/i386/pr122446-amxtile.C: Ditto. (cherry picked from commit 47fe2348131d3450d8970599490bf77eef4ff34c) Diff: --- gcc/config/i386/amxbf16intrin.h | 6 ++- gcc/config/i386/amxcomplexintrin.h | 18 +++++--- gcc/config/i386/amxfp16intrin.h | 8 ++-- gcc/config/i386/amxint8intrin.h | 4 +- gcc/config/i386/amxtileintrin.h | 20 ++++----- gcc/testsuite/g++.target/i386/pr122446-1.C | 17 ++++++++ gcc/testsuite/g++.target/i386/pr122446-amxbf16.C | 16 +++++++ .../g++.target/i386/pr122446-amxcomplex.C | 24 +++++++++++ gcc/testsuite/g++.target/i386/pr122446-amxfp16.C | 16 +++++++ gcc/testsuite/g++.target/i386/pr122446-amxint8.C | 40 +++++++++++++++++ gcc/testsuite/g++.target/i386/pr122446-amxtile.C | 50 ++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c | 2 +- .../gcc.target/i386/amxcomplex-asmintel-1.c | 4 +- gcc/testsuite/gcc.target/i386/amxfp16-asmintel-1.c | 2 +- gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c | 8 ++-- gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c | 8 ++-- 16 files changed, 208 insertions(+), 35 deletions(-) diff --git a/gcc/config/i386/amxbf16intrin.h b/gcc/config/i386/amxbf16intrin.h index 33ee234f7a26..2aa94a0e66df 100644 --- a/gcc/config/i386/amxbf16intrin.h +++ b/gcc/config/i386/amxbf16intrin.h @@ -36,8 +36,10 @@ #if defined(__x86_64__) #define _tile_dpbf16ps_internal(dst,src1,src2) \ - __asm__ volatile\ - ("{tdpbf16ps\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|tdpbf16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::) + __asm__ volatile \ + ("{tdpbf16ps\t%%tmm%c[_src2], %%tmm%c[_src1], %%tmm%c[_dst] \ + |tdpbf16ps\ttmm%c[_dst], tmm%c[_src1], tmm%c[_src2]}" \ + :: [_dst]"i"(dst), [_src1]"i"(src1), [_src2]"i"(src2)) #define _tile_dpbf16ps(dst,src1,src2) \ _tile_dpbf16ps_internal (dst, src1, src2) diff --git a/gcc/config/i386/amxcomplexintrin.h b/gcc/config/i386/amxcomplexintrin.h index 6ea1eca04007..2c7d3f474ab9 100644 --- a/gcc/config/i386/amxcomplexintrin.h +++ b/gcc/config/i386/amxcomplexintrin.h @@ -35,13 +35,17 @@ #endif /* __AMX_COMPLEX__ */ #if defined(__x86_64__) -#define _tile_cmmimfp16ps_internal(src1_dst,src2,src3) \ - __asm__ volatile\ - ("{tcmmimfp16ps\t%%tmm"#src3", %%tmm"#src2", %%tmm"#src1_dst"|tcmmimfp16ps\t%%tmm"#src1_dst", %%tmm"#src2", %%tmm"#src3"}" ::) - -#define _tile_cmmrlfp16ps_internal(src1_dst,src2,src3) \ - __asm__ volatile\ - ("{tcmmrlfp16ps\t%%tmm"#src3", %%tmm"#src2", %%tmm"#src1_dst"|tcmmrlfp16ps\t%%tmm"#src1_dst", %%tmm"#src2", %%tmm"#src3"}" ::) +#define _tile_cmmimfp16ps_internal(src1_dst,src2,src3) \ + __asm__ volatile \ + ("{tcmmimfp16ps\t%%tmm%c[_src3], %%tmm%c[_src2], %%tmm%c[_src1_dst] \ + |tcmmimfp16ps\ttmm%c[_src1_dst], tmm%c[_src2], tmm%c[_src3]}" \ + :: [_src1_dst]"i"(src1_dst), [_src2]"i"(src2), [_src3]"i"(src3)) + +#define _tile_cmmrlfp16ps_internal(src1_dst,src2,src3) \ + __asm__ volatile \ + ("{tcmmrlfp16ps\t%%tmm%c[_src3], %%tmm%c[_src2], %%tmm%c[_src1_dst] \ + |tcmmrlfp16ps\ttmm%c[_src1_dst], tmm%c[_src2], tmm%c[_src3]}" \ + :: [_src1_dst]"i"(src1_dst), [_src2]"i"(src2), [_src3]"i"(src3)) #define _tile_cmmimfp16ps(src1_dst,src2,src3) \ _tile_cmmimfp16ps_internal (src1_dst, src2, src3) diff --git a/gcc/config/i386/amxfp16intrin.h b/gcc/config/i386/amxfp16intrin.h index 340945bd174d..eb7c37235fba 100644 --- a/gcc/config/i386/amxfp16intrin.h +++ b/gcc/config/i386/amxfp16intrin.h @@ -29,9 +29,11 @@ #define _AMXFP16INTRIN_H_INCLUDED #if defined(__x86_64__) -#define _tile_dpfp16ps_internal(dst,src1,src2) \ - __asm__ volatile \ - ("{tdpfp16ps\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|tdpfp16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::) +#define _tile_dpfp16ps_internal(dst,src1,src2) \ + __asm__ volatile \ + ("{tdpfp16ps\t%%tmm%c[_src2], %%tmm%c[_src1], %%tmm%c[_dst] \ + |tdpfp16ps\ttmm%c[_dst], tmm%c[_src1], tmm%c[_src2]}" \ + :: [_dst]"i"(dst), [_src1]"i"(src1), [_src2]"i"(src2)) #define _tile_dpfp16ps(dst,src1,src2) \ _tile_dpfp16ps_internal (dst,src1,src2) diff --git a/gcc/config/i386/amxint8intrin.h b/gcc/config/i386/amxint8intrin.h index 6b69cfbe96ca..9bdbddee1b66 100644 --- a/gcc/config/i386/amxint8intrin.h +++ b/gcc/config/i386/amxint8intrin.h @@ -37,7 +37,9 @@ #if defined(__x86_64__) #define _tile_int8_dp_internal(name,dst,src1,src2) \ __asm__ volatile \ - ("{"#name"\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|"#name"\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::) + ("{"#name"\t%%tmm%c[_src2], %%tmm%c[_src1], %%tmm%c[_dst] \ + |"#name"\ttmm%c[_dst], tmm%c[_src1], tmm%c[_src2]}" \ + ::[_dst]"i"(dst),[_src1]"i"(src1),[_src2]"i"(src2)) #define _tile_dpbssd(dst,src1,src2) \ _tile_int8_dp_internal (tdpbssd, dst, src1, src2) diff --git a/gcc/config/i386/amxtileintrin.h b/gcc/config/i386/amxtileintrin.h index 2ee7b6bad2bf..77e641ce8434 100644 --- a/gcc/config/i386/amxtileintrin.h +++ b/gcc/config/i386/amxtileintrin.h @@ -61,32 +61,32 @@ _tile_release (void) #define _tile_loadd_internal(dst,base,stride) \ __asm__ volatile \ - ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" \ - :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride))) + ("{tileloadd\t(%0,%1,1), %%tmm%c[_dst]|tileloadd\ttmm%c[_dst], [%0+%1*1]}" \ + :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)), [_dst]"i"(dst)) #define _tile_stream_loadd(dst,base,stride) \ _tile_stream_loadd_internal (dst, base, stride) #define _tile_stream_loadd_internal(dst,base,stride) \ __asm__ volatile \ - ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" \ - :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride))) + ("{tileloaddt1\t(%0,%1,1), %%tmm%c[_dst]|tileloaddt1\ttmm%c[_dst], [%0+%1*1]}" \ + :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)), [_dst]"i"(dst)) #define _tile_stored(dst,base,stride) \ _tile_stored_internal (dst, base, stride) #define _tile_stored_internal(src,base,stride) \ __asm__ volatile \ - ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" \ - :: "r" ((void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)) \ - : "memory") + ("{tilestored\t%%tmm%c[_src], (%0,%1,1)|tilestored\t[%0+%1*1], tmm%c[_src]}" \ + :: "r" ((void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)), [_src]"i"(src) \ + : "memory") #define _tile_zero(dst) \ _tile_zero_internal (dst) -#define _tile_zero_internal(dst) \ - __asm__ volatile \ - ("tilezero\t%%tmm"#dst ::) +#define _tile_zero_internal(dst) \ + __asm__ volatile \ + ("{tilezero\t%%tmm%c[_dst]|tilezero\ttmm%c[_dst]}" :: [_dst]"i"(dst)) #endif diff --git a/gcc/testsuite/g++.target/i386/pr122446-1.C b/gcc/testsuite/g++.target/i386/pr122446-1.C new file mode 100644 index 000000000000..39e594f69366 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr122446-1.C @@ -0,0 +1,17 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mamx-tile -mamx-int8 -O0" } */ +/* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm2+\[^\n\]*%tmm1+\[^\n\]*%tmm0" } } */ + +#include <immintrin.h> + +template <int hello, int crazy, int gcc> +struct dpbssd +{ + void operator()() { _tile_dpbssd(hello, crazy, gcc); } +}; + +void f() +{ + dpbssd<0, 1, 2>()(); +} + diff --git a/gcc/testsuite/g++.target/i386/pr122446-amxbf16.C b/gcc/testsuite/g++.target/i386/pr122446-amxbf16.C new file mode 100644 index 000000000000..8ee03911d2bf --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr122446-amxbf16.C @@ -0,0 +1,16 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mamx-tile -mamx-bf16 -O0" } */ +/* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */ + +#include <immintrin.h> + +template <int dst, int src1, int src2> +struct dpbf16ps +{ + void operator()() { _tile_dpbf16ps(dst, src1, src2); } +}; + +void test_amx_bf16() +{ + dpbf16ps<0, 1, 2>()(); +} diff --git a/gcc/testsuite/g++.target/i386/pr122446-amxcomplex.C b/gcc/testsuite/g++.target/i386/pr122446-amxcomplex.C new file mode 100644 index 000000000000..3224b486f239 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr122446-amxcomplex.C @@ -0,0 +1,24 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mamx-tile -mamx-complex -O0" } */ +/* { dg-final { scan-assembler "tcmmimfp16ps\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */ +/* { dg-final { scan-assembler "tcmmrlfp16ps\[ \\t]+%tmm5,\[ \\t\]*%tmm4,\[ \\t\]*%tmm3" } } */ + +#include <immintrin.h> + +template <int dst, int src1, int src2> +struct cmmimfp16ps +{ + void operator()() { _tile_cmmimfp16ps(dst, src1, src2); } +}; + +template <int dst, int src1, int src2> +struct cmmrlfp16ps +{ + void operator()() { _tile_cmmrlfp16ps(dst, src1, src2); } +}; + +void test_amx_complex() +{ + cmmimfp16ps<0, 1, 2>()(); + cmmrlfp16ps<3, 4, 5>()(); +} diff --git a/gcc/testsuite/g++.target/i386/pr122446-amxfp16.C b/gcc/testsuite/g++.target/i386/pr122446-amxfp16.C new file mode 100644 index 000000000000..7467cd9546d4 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr122446-amxfp16.C @@ -0,0 +1,16 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mamx-tile -mamx-fp16 -O0" } */ +/* { dg-final { scan-assembler "tdpfp16ps\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */ + +#include <immintrin.h> + +template <int dst, int src1, int src2> +struct dpfp16ps +{ + void operator()() { _tile_dpfp16ps(dst, src1, src2); } +}; + +void test_amx_fp16() +{ + dpfp16ps<0, 1, 2>()(); +} diff --git a/gcc/testsuite/g++.target/i386/pr122446-amxint8.C b/gcc/testsuite/g++.target/i386/pr122446-amxint8.C new file mode 100644 index 000000000000..039379222a5f --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr122446-amxint8.C @@ -0,0 +1,40 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mamx-tile -mamx-int8 -O0" } */ +/* { dg-final { scan-assembler "tdpbssd\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */ +/* { dg-final { scan-assembler "tdpbsud\[ \\t]+%tmm5,\[ \\t\]*%tmm4,\[ \\t\]*%tmm3" } } */ +/* { dg-final { scan-assembler "tdpbusd\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm6" } } */ +/* { dg-final { scan-assembler "tdpbuud\[ \\t]+%tmm1,\[ \\t\]*%tmm0,\[ \\t\]*%tmm7" } } */ + +#include <immintrin.h> + +template <int dst, int src1, int src2> +struct dpbssd +{ + void operator()() { _tile_dpbssd(dst, src1, src2); } +}; + +template <int dst, int src1, int src2> +struct dpbsud +{ + void operator()() { _tile_dpbsud(dst, src1, src2); } +}; + +template <int dst, int src1, int src2> +struct dpbusd +{ + void operator()() { _tile_dpbusd(dst, src1, src2); } +}; + +template <int dst, int src1, int src2> +struct dpbuud +{ + void operator()() { _tile_dpbuud(dst, src1, src2); } +}; + +void test_amx_int8() +{ + dpbssd<0, 1, 2>()(); + dpbsud<3, 4, 5>()(); + dpbusd<6, 1, 2>()(); + dpbuud<7, 0, 1>()(); +} diff --git a/gcc/testsuite/g++.target/i386/pr122446-amxtile.C b/gcc/testsuite/g++.target/i386/pr122446-amxtile.C new file mode 100644 index 000000000000..6836ba492d03 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr122446-amxtile.C @@ -0,0 +1,50 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mamx-tile -O0" } */ +/* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*,\[ \\t\]*%tmm0" } } */ +/* { dg-final { scan-assembler "tilestored\[ \\t]+%tmm1," } } */ +/* { dg-final { scan-assembler "tilezero\[ \\t]+%tmm3" } } */ +/* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*,\[ \\t\]*%tmm2" } } */ + +#include <immintrin.h> + +template <int tmm_num> +struct tile_loadd_test +{ + void operator()(const void* base, int stride) + { + _tile_loadd(tmm_num, base, stride); + } +}; + +template <int tmm_num> +struct tile_stored_test +{ + void operator()(void* base, int stride) + { + _tile_stored(tmm_num, base, stride); + } +}; + +template <int tmm_num> +struct tile_zero_test +{ + void operator()() { _tile_zero(tmm_num); } +}; + +template <int tmm_num> +struct tile_stream_loadd_test +{ + void operator()(const void* base, int stride) + { + _tile_stream_loadd(tmm_num, base, stride); + } +}; + +void test_amx_tile() +{ + char buf[1024]; + tile_loadd_test<0>()(buf, 64); + tile_stored_test<1>()(buf, 64); + tile_stream_loadd_test<2>()(buf, 64); + tile_zero_test<3>()(); +} diff --git a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c index 54194e1c5b0b..80d129e77ed8 100644 --- a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-bf16 -masm=intel" } */ -/* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ +/* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ #include <immintrin.h> void TEST () diff --git a/gcc/testsuite/gcc.target/i386/amxcomplex-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxcomplex-asmintel-1.c index 305465e88607..51997b73e02e 100644 --- a/gcc/testsuite/gcc.target/i386/amxcomplex-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxcomplex-asmintel-1.c @@ -1,8 +1,8 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-complex -masm=intel" } */ -/* { dg-final { scan-assembler "tcmmimfp16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ -/* { dg-final { scan-assembler "tcmmrlfp16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ +/* { dg-final { scan-assembler "tcmmimfp16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ +/* { dg-final { scan-assembler "tcmmrlfp16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ #include <immintrin.h> void TEST() diff --git a/gcc/testsuite/gcc.target/i386/amxfp16-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxfp16-asmintel-1.c index a8dff945f23f..8895da9aa8d0 100644 --- a/gcc/testsuite/gcc.target/i386/amxfp16-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxfp16-asmintel-1.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-fp16 -masm=intel" } */ -/* { dg-final { scan-assembler "tdpfp16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ +/* { dg-final { scan-assembler "tdpfp16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ #include <immintrin.h> void TEST () diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c index f8c376ae6c4a..46c1fa06fa18 100644 --- a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c @@ -1,10 +1,10 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-int8 -masm=intel" } */ -/* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ -/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } * -/* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ -/* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ +/* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ +/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ +/* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ +/* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3" } } */ #include <immintrin.h> void TEST () diff --git a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c index 6c08fec516ca..661645d09d5d 100644 --- a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c @@ -4,10 +4,10 @@ /* { dg-final { scan-assembler "ldtilecfg\[ \\t]" } } */ /* { dg-final { scan-assembler "sttilecfg\[ \\t]" } } */ /* { dg-final { scan-assembler "tilerelease" } } */ -/* { dg-final { scan-assembler "tileloadd\[ \\t]%tmm\[0-9\]" } } */ -/* { dg-final { scan-assembler "tileloaddt1\[ \\t]%tmm\[0-9\]" } } */ -/* { dg-final { scan-assembler "tilestored\[ \\t]\[^\n\]+\[^\n\]*%tmm\[0-9\]" } } */ -/* { dg-final { scan-assembler "tilezero\[ \\t]+\[^\n\]*%tmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "tileloadd\[ \\t]tmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "tileloaddt1\[ \\t]tmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "tilestored\[ \\t]\[^\n\]+\[^\n\]*tmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "tilezero\[ \\t]+\[^\n%\]*tmm\[0-9\]" } } */ #include <immintrin.h> extern int a[];
