https://gcc.gnu.org/g:65ed2b042c2b85cd209efeb13ea60378a322ea61
commit r16-6862-g65ed2b042c2b85cd209efeb13ea60378a322ea61 Author: Sandra Loosemore <[email protected]> Date: Sat Dec 27 21:03:55 2025 +0000 doc, rl78: Clean up RL78 option documentation [PR122243] [PR71340] This target is probably dead (no listed maintainer and no support for LRA). There seems to be no interest in reviving the 2014 patch for the documented but never-committed -m64bit-doubles and -m32bit-doubles options, so I've removed those docs instead, along with some other routine housekeeping to keep the docs in sync with the options file. gcc/ChangeLog PR other/122243 PR target/71340 * doc/invoke.texi (Option Summary) <RL78 Options>: Remove never-implemented -m64bit-doubles and -m32bit-doubles options. Add missing entries for -mrelax, -mes0, -mmul=rl78, -mcpu=rl78, and -mrl78. (RL78 Options): Likewise. Add missing @opindex entries. Light copy-editing. Diff: --- gcc/doc/invoke.texi | 37 +++++++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 14 deletions(-) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index b703b531d755..42aed3eb0b4f 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1336,9 +1336,11 @@ See RS/6000 and PowerPC Options. -madjust-lmul-cost -mmax-vectorization -mno-autovec-segment} @emph{RL78 Options} (@ref{RL78 Options}) -@gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs --mcpu=g10 -mcpu=g13 -mcpu=g14 -mg10 -mg13 -mg14 --m64bit-doubles -m32bit-doubles -msave-mduc-in-interrupts} +@gccoptlist{-msim -mallregs -mrelax -mes0 +-mmul=none -mmul=g13 -mmul=g14 -mmul=rl78 +-mcpu=g10 -mcpu=g13 -mcpu=g14 -mcpu=rl78 +-mg10 -mg13 -mg14 -mrl78 +-msave-mduc-in-interrupts} @emph{RS/6000 and PowerPC Options} (@ref{RS/6000 and PowerPC Options}) @gccoptlist{-mcpu=@var{cpu-type} @@ -32444,6 +32446,7 @@ This option is enabled by default. @table @gcctabopt @opindex msim +@opindex mno-sim @item -msim Links in additional target libraries to support operation within a simulator. @@ -32489,8 +32492,8 @@ Note, although the RL78/G14 core is the default target, specifying @option{-mcpu=g14} or @option{-mcpu=rl78} on the command line does change the behavior of the toolchain since it also enables G14 hardware multiply support. If these options are not specified on the -command line then software multiplication routines will be used even -though the code targets the RL78 core. This is for backwards +command line, then software multiplication routines are used even +though the code targets the RL78 core. This is for backward compatibility with older toolchains which did not have hardware multiply and divide support. @@ -32510,19 +32513,25 @@ These are aliases for the corresponding @option{-mcpu=} option. They are provided for backwards compatibility. @opindex mallregs +@opindex mno-allregs @item -mallregs Allow the compiler to use all of the available registers. By default registers @code{r24..r31} are reserved for use in interrupt handlers. With this option enabled these registers can be used in ordinary functions as well. -@opindex m64bit-doubles -@opindex m32bit-doubles -@item -m64bit-doubles -@itemx -m32bit-doubles -Make the @code{double} data type be 64 bits (@option{-m64bit-doubles}) -or 32 bits (@option{-m32bit-doubles}) in size. The default is -@option{-m32bit-doubles}. +@opindex mrelax +@opindex mno-relax +@item -mrelax +@itemx -mno-relax +Enable/disable assembler and linker relaxation. This is enabled by +default at @option{-Os}. + +@opindex mes0 +@opindex mno-es0 +@item -mes0 +Assume @code{ES} is zero throughout program execution, and use it +to address read-only data. @opindex msave-mduc-in-interrupts @opindex mno-save-mduc-in-interrupts @@ -32532,9 +32541,9 @@ Specifies that interrupt handler functions should preserve the MDUC registers. This is only necessary if normal code might use the MDUC registers, for example because it performs multiplication and division operations. The default is to ignore the MDUC registers -as this makes the interrupt handlers faster. The target option -mg13 +as this makes the interrupt handlers faster. The target option @option{-mg13} needs to be passed for this to work as this feature is only available -on the G13 target (S2 core). The MDUC registers will only be saved +on the G13 target (S2 core). The MDUC registers are only saved if the interrupt handler performs a multiplication or division operation or it calls another function.
