https://gcc.gnu.org/g:451a1046d16fb6f489c85df91ad2278d3fd8927e
commit r16-6864-g451a1046d16fb6f489c85df91ad2278d3fd8927e Author: Sandra Loosemore <[email protected]> Date: Thu Jan 1 18:29:54 2026 +0000 doc, rx: Clean up RX options documentation [PR122243] gcc/ChangeLog PR other/122243 * config/rx/rx.opt (mgcc-abi, mrx-abi): Mark as Undocumented. * doc/invoke.texi (Option Summary) <RX Options>: Remove redundant entries for -mno-forms, correct name of -msmall-data-limit option, add -mlra, clean up formatting. (RX Options): Minor copy-editing, add -mlra. Diff: --- gcc/config/rx/rx.opt | 4 ++-- gcc/doc/invoke.texi | 29 +++++++++++++++-------------- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/gcc/config/rx/rx.opt b/gcc/config/rx/rx.opt index 36abd54a40d0..5caad4873892 100644 --- a/gcc/config/rx/rx.opt +++ b/gcc/config/rx/rx.opt @@ -119,11 +119,11 @@ Warn when multiple, different, fast interrupt handlers are in the compilation un ;--------------------------------------------------- mgcc-abi -Target RejectNegative Mask(GCC_ABI) +Target Undocumented RejectNegative Mask(GCC_ABI) Enable the use of the old, broken, ABI where all stacked function arguments are aligned to 32-bits. mrx-abi -Target RejectNegative InverseMask(GCC_ABI) +Target Undocumented RejectNegative InverseMask(GCC_ABI) Enable the use the standard RX ABI where all stacked function arguments are naturally aligned. This is the default. ;--------------------------------------------------- diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 5003f3e96249..71b3871eba58 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1391,19 +1391,14 @@ See RS/6000 and PowerPC Options. @emph{RX Options} (@ref{RX Options}) @gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu --mcpu= +-mcpu=@var{name} -mbig-endian-data -mlittle-endian-data --msmall-data --msim -mno-sim --mas100-syntax -mno-as100-syntax --mrelax --mmax-constant-size= --mint-register= --mpid --mallow-string-insns -mno-allow-string-insns --mjsr --mno-warn-multiple-fast-interrupts --msave-acc-in-interrupts} +-msmall-data-limit=@var{N} +-msim -mas100-syntax -mrelax +-mmax-constant-size=@var{N} -mint-register=@var{N} +-mpid -mno-allow-string-insns -mjsr +-mno-warn-multiple-fast-interrupts -msave-acc-in-interrupts +-mlra} @emph{S/390 and zSeries Options} (@ref{S/390 and zSeries Options}) @gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @@ -33755,7 +33750,7 @@ format. @opindex msmall-data-limit @item -msmall-data-limit=@var{N} Specifies the maximum size in bytes of global and static variables -which can be placed into the small data area. Using the small data +that can be placed into the small data area. Using the small data area can lead to smaller and faster code, but the size of area is limited and it is up to the programmer to ensure that the area does not overflow. Also when the small data area is used one of the RX's @@ -33832,7 +33827,7 @@ makes the interrupt handlers faster. @opindex mno-pid @item -mpid @itemx -mno-pid -Enables the generation of position independent data. When enabled any +Enables the generation of position-independent data. When enabled, any access to constant data is done via an offset from a base address held in a register. This allows the location of constant data to be determined at run time without requiring the executable to be @@ -33896,6 +33891,12 @@ Use only (or not only) @code{JSR} instructions to access functions. This option can be used when code size exceeds the range of @code{BSR} instructions. Note that @option{-mno-jsr} does not mean to not use @code{JSR} but instead means that any type of branch may be used. + +@opindex mlra +@opindex mno-lra +@item -mlra +Use the new LRA register allocator. By default, the old ``reload'' +allocator is used. @end table @emph{Note:} The generic GCC command-line option @option{-ffixed-@var{reg}}
