https://gcc.gnu.org/g:38927ecc9dbcae94565b58c1de51b5168709cc9e
commit r16-7005-g38927ecc9dbcae94565b58c1de51b5168709cc9e Author: Robin Dapp <[email protected]> Date: Fri Jan 23 09:25:56 2026 +0100 RISC-V: testsuite: Add vector requirement to test. This adds the missing vector requirement to rvv/base/pr122869.c Signed-off-by: Robin Dapp <[email protected]> gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr122869.c: Add vector requirement. Diff: --- gcc/testsuite/gcc.target/riscv/rvv/base/pr122869.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr122869.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr122869.c index e00ac04bebbe..6f9be80841cd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr122869.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr122869.c @@ -1,5 +1,7 @@ -/* { dg-do run } */ +/* { dg-do run { target { riscv_v } } } */ /* { dg-additional-options "-O0 -std=gnu99" } */ +/* { dg-require-effective-target riscv_v_ok } */ + /* We used to generate a separate riscv_read_vl () after the FoF load. In case of -O0 (or otherwise) it could happen that "g" wouldn't get a hard reg and we'd need to store it, clobbering VL.
