https://gcc.gnu.org/g:afaaa57f5c60af03b6f6434cfe888d37793aba1d
commit afaaa57f5c60af03b6f6434cfe888d37793aba1d Author: Alexandre Oliva <[email protected]> Date: Sat Jan 31 01:52:40 2026 -0300 it From: Alexandre Oliva <[email protected]> testsuite: riscv: set expected code model When testing a compiler configured to default to the medany code model, riscv autovec binop vadd and vsub -nofm tests fail because their codegen expectations don't match the generated code. Set the code model to the medlow model that the tests expect. for gcc/testsuite/ChangeLog * gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c: Set the expected code model explicitly. * gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c: Likewise. * gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c: Likewise. * gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c: Likewise. Diff: --- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c index ca0ea0b16c84..64596235018b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d -mcmodel=medlow -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ #include "vadd-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c index c839ac7d7804..a78abf43c931 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d -mcmodel=medlow -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ #include "vadd-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c index c57ac805372f..926ab7e4a55f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d -mcmodel=medlow -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ #include "vsub-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c index a79d7270d886..a29b2e8c3fdf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d -mcmodel=medlow -mrvv-vector-bits=scalable -fdump-tree-optimized-details -fno-pie" } */ #include "vsub-template.h"
