https://gcc.gnu.org/g:d440550c7b860aa34d993af325b8e44ee3b82bc7
commit r16-7544-gd440550c7b860aa34d993af325b8e44ee3b82bc7 Author: Rainer Orth <[email protected]> Date: Tue Feb 17 10:00:40 2026 +0100 testsuite: Fix gcc.dg/asm-hard-reg-1.c on x86 The gcc.dg/asm-hard-reg-1.c test FAILs on i386-pc-solaris2.11 and i686-pc-linux-gnu with -m64: FAIL: gcc.dg/asm-hard-reg-1.c scan-assembler-times foo\\t%ecx 4 It turns out the target selectors of the x86 scans are badly confused: * Using an i?86-*-* target selector is always wrong given the existance of biarch i?86-*-* targets. They should use the x86 effective target with ilp32 instead. * dg directives don't heed the preprocessor, so scans were duplicated for i?86-*-* and x86-*-*, sometimes with different target selectors. This patch simplifies and fixes the target selectors, removing duplication. Tested on i386-pc-solaris2.11 with -m32/-m64 and x86_64-pc-linux-gnu with -m64/-m32/-mx32, and i686-pc-linux-gnu with -m32/-m64. 2026-02-16 Rainer Orth <[email protected]> gcc/testsuite: * gcc.dg/asm-hard-reg-1.c: Simplify x86 target selectors. Remove duplicates. Diff: --- gcc/testsuite/gcc.dg/asm-hard-reg-1.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-1.c b/gcc/testsuite/gcc.dg/asm-hard-reg-1.c index 8cefb6e6980c..b31cc0d65921 100644 --- a/gcc/testsuite/gcc.dg/asm-hard-reg-1.c +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-1.c @@ -8,9 +8,13 @@ /* { dg-final { scan-assembler-times "foo\tr4" 8 { target { arm*-*-* } } } } */ #elif defined (__i386__) # define GPR "{ecx}" -/* { dg-final { scan-assembler-times "foo\t%cl" 2 { target { i?86-*-* } } } } */ -/* { dg-final { scan-assembler-times "foo\t%cx" 2 { target { i?86-*-* } } } } */ -/* { dg-final { scan-assembler-times "foo\t%ecx" 4 { target { i?86-*-* } } } } */ +#elif defined (__x86_64__) +# define GPR "{rcx}" +/* { dg-final { scan-assembler-times "foo\t%cl" 2 { target x86 } } } */ +/* { dg-final { scan-assembler-times "foo\t%cx" 2 { target x86 } } } */ +/* { dg-final { scan-assembler-times "foo\t%ecx" 4 { target { x86 && ilp32 } } } } */ +/* { dg-final { scan-assembler-times "foo\t%ecx" 2 { target { x86 && lp64 } } } } */ +/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { x86 && lp64 } } } } */ #elif defined (__powerpc__) || defined (__POWERPC__) # define GPR "{r5}" /* { dg-final { scan-assembler-times "foo\t5" 8 { target { powerpc*-*-* } } } } */ @@ -20,13 +24,6 @@ #elif defined (__s390__) # define GPR "{r4}" /* { dg-final { scan-assembler-times "foo\t%r4" 8 { target { s390*-*-* } } } } */ -#elif defined (__x86_64__) -# define GPR "{rcx}" -/* { dg-final { scan-assembler-times "foo\t%cl" 2 { target { i?86-*-* x86_64-*-* } } } } */ -/* { dg-final { scan-assembler-times "foo\t%cx" 2 { target { i?86-*-* x86_64-*-* } } } } */ -/* { dg-final { scan-assembler-times "foo\t%ecx" 2 { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */ -/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */ -/* { dg-final { scan-assembler-times "foo\t%ecx" 4 { target { { i?86-*-* x86_64-*-* } && { ! lp64 } } } } } */ #endif char
