https://gcc.gnu.org/g:cdb398f1046e7e51da2bbf7980f83ed4070215ab
commit r16-7639-gcdb398f1046e7e51da2bbf7980f83ed4070215ab Author: Alice Carlotti <[email protected]> Date: Fri Jan 2 16:58:09 2026 +0000 aarch64: Adjust TARGET_SVE{2} Many instructions that are currently gated on TARGET_SVE or TARGET_SVE2 are also available in streaming mode when non-streaming SVE is disabled. The simplest way to reflect this is by updating the macros to include "|| TARGET_STREAMING". Any SVE/SVE2 instructions that aren't available in streaming mode already have an explicit "&& TARGET_NONSTREAMING" in their condition, so in this case the extra condition has no impact besides a marginal performance loss. There are two uses of TARGET_SVE{2} that need handling separately: - In aarch64_adjust_generic_arch_tuning, we are using features as a proxy for tuning decisions, in which case we should treat non-streaming mode with SME enabled the same as if either SVE2 or streaming mode are enabled. - In aarch64_update_cpp_builtins, streaming mode enablement is not a relevant condition for defining __ARM_FEATURE_* macros, so use an explicit feature flags check instead. gcc/ChangeLog: * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Replace TARGET_SVE{2} with explicit feature flag checks. * config/aarch64/aarch64.cc (aarch64_adjust_generic_arch_tuning): Add SME to SVE2 check. * config/aarch64/aarch64.h (TARGET_SVE): Adjust condition. (TARGET_SVE2): Ditto. Diff: --- gcc/config/aarch64/aarch64-c.cc | 6 +++--- gcc/config/aarch64/aarch64.cc | 2 +- gcc/config/aarch64/aarch64.h | 8 ++++---- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc index dbe940a8ba92..a355cfdd1698 100644 --- a/gcc/config/aarch64/aarch64-c.cc +++ b/gcc/config/aarch64/aarch64-c.cc @@ -196,7 +196,7 @@ aarch64_update_cpp_builtins (cpp_reader *pfile) aarch64_def_or_undef (TARGET_AES && TARGET_SHA2, "__ARM_FEATURE_CRYPTO", pfile); aarch64_def_or_undef (TARGET_SIMD_RDMA, "__ARM_FEATURE_QRDMX", pfile); - aarch64_def_or_undef (TARGET_SVE, "__ARM_FEATURE_SVE", pfile); + aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE), "__ARM_FEATURE_SVE", pfile); cpp_undef (pfile, "__ARM_FEATURE_SVE_BITS"); cpp_undef (pfile, "__ARM_FEATURE_SVE_VECTOR_OPERATORS"); cpp_undef (pfile, "__ARM_FEATURE_SVE_PREDICATE_OPERATORS"); @@ -221,9 +221,9 @@ aarch64_update_cpp_builtins (cpp_reader *pfile) aarch64_def_or_undef (TARGET_SVE_F64MM, "__ARM_FEATURE_SVE_MATMUL_FP64", pfile); aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE_B16B16) - && (TARGET_SVE2 || TARGET_SME2), + && (AARCH64_HAVE_ISA (SVE2) || TARGET_SME2), "__ARM_FEATURE_SVE_B16B16", pfile); - aarch64_def_or_undef (TARGET_SVE2, "__ARM_FEATURE_SVE2", pfile); + aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE2), "__ARM_FEATURE_SVE2", pfile); aarch64_def_or_undef (TARGET_SVE2_AES, "__ARM_FEATURE_SVE2_AES", pfile); aarch64_def_or_undef (TARGET_SVE2_BITPERM, "__ARM_FEATURE_SVE2_BITPERM", pfile); diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index c6ba4dc56a3a..3f1b7dfb9d30 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -19525,7 +19525,7 @@ aarch64_adjust_generic_arch_tuning (struct tune_params ¤t_tune) /* Neoverse V1 is the only core that is known to benefit from AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS. There is therefore no point enabling it for SVE2 and above. */ - if (TARGET_SVE2) + if (TARGET_SVE2 || TARGET_SME) current_tune.extra_tuning_flags &= ~AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS; if (!AARCH64_HAVE_ISA(V8_8A)) diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 21f9682ef97c..d61705d78f61 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -284,11 +284,11 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED /* Dot Product is an optional extension to AdvSIMD enabled through +dotprod. */ #define TARGET_DOTPROD AARCH64_HAVE_ISA (DOTPROD) -/* SVE instructions, enabled through +sve. */ -#define TARGET_SVE AARCH64_HAVE_ISA (SVE) +/* SVE instructions, enabled in non-streaming mode through +sve. */ +#define TARGET_SVE (AARCH64_HAVE_ISA (SVE) || TARGET_STREAMING) -/* SVE2 instructions, enabled through +sve2. */ -#define TARGET_SVE2 AARCH64_HAVE_ISA (SVE2) +/* SVE2 instructions, enabled in non-streaming mode through +sve2. */ +#define TARGET_SVE2 (AARCH64_HAVE_ISA (SVE2) || TARGET_STREAMING) /* SVE2 AES instructions, enabled through +sve2-aes. */ #define TARGET_SVE2_AES (AARCH64_HAVE_ISA (SVE2) \
