https://gcc.gnu.org/g:f502a64b610793f1b958e8f035f72fffe1f72456
commit f502a64b610793f1b958e8f035f72fffe1f72456 Author: Michael Meissner <[email protected]> Date: Wed May 6 09:48:17 2026 -0400 Fix conversion from integer to 16-bit floating point 2026-05-06 Michael Meissner <[email protected]> gcc/ * config/rs6000/float16.md (float<GPR:mode><FP16_HW:mode>2): Require input to be a register. (floatuns<GPR:mode><FP16_HW:mode>2): Likewise. Diff: --- gcc/config/rs6000/float16.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/rs6000/float16.md b/gcc/config/rs6000/float16.md index 7a24236279e0..3db3dcc61445 100644 --- a/gcc/config/rs6000/float16.md +++ b/gcc/config/rs6000/float16.md @@ -486,7 +486,7 @@ (define_expand "float<GPR:mode><FP16_HW:mode>2" [(set (match_operand:FP16_HW 0 "vsx_register_operand") (float:FP16_HW - (match_operand:GPR 1 "nonimmediate_operand")))] + (match_operand:GPR 1 "vsx_register_operand")))] "" { rtx df_tmp = gen_reg_rtx (DFmode); @@ -498,7 +498,7 @@ (define_expand "floatuns<GPR:mode><FP16_HW:mode>2" [(set (match_operand:FP16_HW 0 "vsx_register_operand") (unsigned_float:FP16_HW - (match_operand:GPR 1 "nonimmediate_operand")))] + (match_operand:GPR 1 "vsx_register_operand")))] "" { rtx df_tmp = gen_reg_rtx (DFmode);
