https://gcc.gnu.org/g:bd64a7b9437c39ef0fe9bea25a0d81eaff25b3a5

commit r17-532-gbd64a7b9437c39ef0fe9bea25a0d81eaff25b3a5
Author: Lili Cui <[email protected]>
Date:   Fri May 15 21:33:25 2026 +0800

    testsuite: Add aarch64 SVE support to slp-reduc-15.c
    
    Add aarch64 SVE support and use -mavx2 for x86 to support all x86
    modes.
    
    Changes:
    - Add aarch64-*-* target with -march=armv8.2-a+sve
    - Use -mavx2 instead of -march=x86-64-v3 to support all x86 modes
    - Separate -fgimple from architecture-specific options.
    
    Reported-by: https://linaro.atlassian.net/browse/GNU-1901
    
    gcc/testsuite/ChangeLog:
    
            * gcc.dg/vect/slp-reduc-15.c: Add aarch64 support and use
            -mavx2 for x86.

Diff:
---
 gcc/testsuite/gcc.dg/vect/slp-reduc-15.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/vect/slp-reduc-15.c 
b/gcc/testsuite/gcc.dg/vect/slp-reduc-15.c
index 4745f85511b9..a28c13a92f59 100644
--- a/gcc/testsuite/gcc.dg/vect/slp-reduc-15.c
+++ b/gcc/testsuite/gcc.dg/vect/slp-reduc-15.c
@@ -1,6 +1,7 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target vect_float } */
-/* { dg-additional-options "-fgimple -march=x86-64-v3" { target x86_64-*-* } } 
*/
+/* { dg-do compile { target { x86 || aarch64-*-* } } } */
+/* { dg-additional-options "-fgimple" } */
+/* { dg-additional-options "-mavx2" { target x86 } } */
+/* { dg-additional-options "-march=armv8.2-a+sve" { target aarch64-*-* } } */
 
 /* Test that SLP reduction vectorization handles commutative operand swap
    for .COND_ADD in multi-lane SLP where the reduction operand appears
@@ -76,6 +77,6 @@ foo (float * restrict p0, float * restrict p1,
 
 /* With the IFN commutative swap fix, these 4 reductions should be
    vectorized using SLP despite different reduc_idx values (1 vs 2).  */
-/* { dg-final { scan-tree-dump "swapped operands to match def types in" "vect" 
{ target x86_64-*-* } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" { 
target x86_64-*-* } } } */
+/* { dg-final { scan-tree-dump "swapped operands to match def types in" "vect" 
} } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" } 
} */

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