https://gcc.gnu.org/g:aea40d1bafc73b8b8d60f7bbeeb9f7f26c76aa07
commit r15-11181-gaea40d1bafc73b8b8d60f7bbeeb9f7f26c76aa07 Author: Andi Kleen <[email protected]> Date: Mon May 18 08:40:53 2026 -0700 Fix masm ptwrite again The earlier 64bit ptwrite as 32bit fix broke Intel syntax output. Handle that too by using an alternative. In Intel syntax the instruction data type is defined by the operands. I'll commit it as obvious in a day or so for 15/16/trunk, unless there are objections. PR target/125351 gcc/ChangeLog: * config/i386/i386.md: Use alternative to handle masm ptwrite syntax. gcc/testsuite/ChangeLog: * gcc.target/i386/pr125351.c: New test. Diff: --- gcc/config/i386/i386.md | 2 +- gcc/testsuite/gcc.target/i386/pr125351.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 47a07904ba01..03eb56d9010d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -29508,7 +29508,7 @@ [(unspec_volatile [(match_operand:SWI48 0 "nonimmediate_operand" "rm")] UNSPECV_PTWRITE)] "TARGET_PTWRITE" - "ptwrite<imodesuffix>\t%0" + "ptwrite{<imodesuffix>|}\t%0" [(set_attr "type" "other") (set_attr "prefix_0f" "1") (set_attr "prefix_rep" "1")]) diff --git a/gcc/testsuite/gcc.target/i386/pr125351.c b/gcc/testsuite/gcc.target/i386/pr125351.c new file mode 100644 index 000000000000..f21adcae44a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr125351.c @@ -0,0 +1,3 @@ +/* { dg-do compile } */ +/* { dg-options "-mptwrite -masm=intel" } */ +void foo() { __builtin_ia32_ptwrite32(0); }
