https://gcc.gnu.org/g:5dfe1056b85f249e7b4ad454a59f2951c716191e
commit r17-621-g5dfe1056b85f249e7b4ad454a59f2951c716191e Author: Uros Bizjak <[email protected]> Date: Thu May 14 18:38:46 2026 +0200 i386: Remove TARGET_SHIFT1 tuning feature All supported versions of GNU as automatically encode "sal $1, reg" using the shorter implicit-count-1 form (opcode D1), making the compiler-side i486 TARGET_SHIFT1 / X86_TUNE_SHIFT1 logic redundant. Remove the tuning feature and simplify all affected shift instruction patterns by unconditionally emitting the explicit-immediate form and relying on the assembler to produce the optimal encoding. Update the length_immediate attributes accordingly to report 0 for const-1 shift counts, correctly reflecting the assembled output. gcc/ChangeLog: * config/i386/x86-tune.def (X86_TUNE_SHIFT1): Remove. * config/i386/i386.h (TARGET_SHIFT1): Remove. * config/i386/i386.md (*ashl<mode>3_1<nf_name>): Remove TARGET_SHIFT1-gated implicit-1 encoding and simplify length_immediate attribute. (*ashlsi3_1_zext): Likewise. (*ashlhi3_1<nf_name>): Likewise. (*ashlqi3_1<nf_name>): Likewise. (*ashl<mode>3_1_slp): Likewise. (*ashl<mode>3_cmp): Likewise. (*ashlsi3_cmp): Likewise. (*<any_shiftrt:insn><mode>3_1<nf_name>): Likewise. (*<any_shiftrt:insn>si3_1_zext): Likewise. (*<any_shiftrt:insn><mode>3_1_slp): Likewise. (*<any_shiftrt:insn><mode>3_cconly): Likewise. (*<any_shiftrt:insn>qi_ext<mode>_1): Likewise. (<any_shiftrt:insn><mode>3_carry): Likewise. Diff: --- gcc/config/i386/i386.h | 1 - gcc/config/i386/i386.md | 369 +++++++++++-------------------------------- gcc/config/i386/x86-tune.def | 4 - 3 files changed, 88 insertions(+), 286 deletions(-) diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 21108f399384..ac3f2213e781 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -401,7 +401,6 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ix86_tune_features[X86_TUNE_PROLOGUE_USING_MOVE] #define TARGET_EPILOGUE_USING_MOVE \ ix86_tune_features[X86_TUNE_EPILOGUE_USING_MOVE] -#define TARGET_SHIFT1 ix86_tune_features[X86_TUNE_SHIFT1] #define TARGET_USE_FFREEP ix86_tune_features[X86_TUNE_USE_FFREEP] #define TARGET_INTER_UNIT_MOVES_TO_VEC \ ix86_tune_features[X86_TUNE_INTER_UNIT_MOVES_TO_VEC] diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 7faff1e85138..063e14cb2c17 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -16346,16 +16346,8 @@ return "<nf_prefix>add{<imodesuffix>}\t%0, %0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - /* For NDD form instructions related to TARGET_SHIFT1, the $1 - immediate do not need to be omitted as assembler will map it - to use shorter encoding. */ - && !use_ndd && !<nf_applied>) - return "sal{<imodesuffix>}\t%0"; - else - return use_ndd ? "<nf_prefix>sal{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>sal{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "<nf_prefix>sal{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>sal{<imodesuffix>}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,*,bmi2,avx512bw,apx_ndd") @@ -16364,23 +16356,21 @@ (const_string "lea") (eq_attr "alternative" "2") (const_string "ishiftx") + (eq_attr "alternative" "3") + (const_string "msklog") (eq_attr "alternative" "4") (const_string "ishift") - (and (and (match_test "TARGET_DOUBLE_WITH_ADD") + (and (and (match_test "TARGET_DOUBLE_WITH_ADD") (match_operand 0 "register_operand")) (match_operand 2 "const1_operand")) (const_string "alu") - (eq_attr "alternative" "3") - (const_string "msklog") ] (const_string "ishift"))) (set (attr "length_immediate") (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -16461,13 +16451,8 @@ return "add{l}\t%k0, %k0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "sal{l}\t%k0"; - else - return use_ndd ? "sal{l}\t{%2, %1, %k0|%k0, %1, %2}" - : "sal{l}\t{%2, %k0|%k0, %2}"; + return use_ndd ? "sal{l}\t{%2, %1, %k0|%k0, %1, %2}" + : "sal{l}\t{%2, %k0|%k0, %2}"; } } [(set_attr "isa" "*,*,bmi2,apx_ndd") @@ -16487,9 +16472,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "mode" "SI")]) @@ -16530,13 +16513,8 @@ return "<nf_prefix>add{w}\t%0, %0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "sal{w}\t%0"; - else - return use_ndd ? "<nf_prefix>sal{w}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>sal{w}\t{%2, %0|%0, %2}"; + return use_ndd ? "<nf_prefix>sal{w}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>sal{w}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,*,avx512f,apx_ndd") @@ -16557,9 +16535,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -16592,23 +16568,11 @@ return "<nf_prefix>add{b}\t%0, %0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - { - if (get_attr_mode (insn) == MODE_SI) - return "sal{l}\t%k0"; - else - return "sal{b}\t%0"; - } + if (get_attr_mode (insn) == MODE_SI) + return "<nf_prefix>sal{l}\t{%2, %k0|%k0, %2}"; else - { - if (get_attr_mode (insn) == MODE_SI) - return "<nf_prefix>sal{l}\t{%2, %k0|%k0, %2}"; - else - return use_ndd ? "<nf_prefix>sal{b}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>sal{b}\t{%2, %0|%0, %2}"; - } + return use_ndd ? "<nf_prefix>sal{b}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>sal{b}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,*,*,avx512dq,apx_ndd") @@ -16629,9 +16593,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -16660,11 +16622,7 @@ return "add{<imodesuffix>}\t%0, %0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) - return "sal{<imodesuffix>}\t%0"; - else - return "sal{<imodesuffix>}\t{%2, %0|%0, %2}"; + return "sal{<imodesuffix>}\t{%2, %0|%0, %2}"; } } "&& reload_completed @@ -16685,9 +16643,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "mode" "<MODE>")]) @@ -16758,9 +16714,7 @@ (ashift:SWI (match_dup 1) (match_dup 2)))] "(optimize_function_for_size_p (cfun) || !TARGET_PARTIAL_FLAG_REG_STALL - || (operands[2] == const1_rtx - && (TARGET_SHIFT1 - || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0]))))) + || operands[2] == const1_rtx) && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands, TARGET_APX_NDD)" { @@ -16772,13 +16726,8 @@ return "add{<imodesuffix>}\t%0, %0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "sal{<imodesuffix>}\t%0"; - else - return use_ndd ? "sal{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "sal{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "sal{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "sal{<imodesuffix>}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,apx_ndd") @@ -16795,9 +16744,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "mode" "<MODE>")]) @@ -16813,9 +16760,7 @@ "TARGET_64BIT && (optimize_function_for_size_p (cfun) || !TARGET_PARTIAL_FLAG_REG_STALL - || (operands[2] == const1_rtx - && (TARGET_SHIFT1 - || TARGET_DOUBLE_WITH_ADD))) + || operands[2] == const1_rtx) && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFT, SImode, operands, TARGET_APX_NDD)" { @@ -16827,13 +16772,8 @@ return "add{l}\t%k0, %k0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "sal{l}\t%k0"; - else - return use_ndd ? "sal{l}\t{%2, %1, %k0|%k0, %1, %2}" - : "sal{l}\t{%2, %k0|%k0, %2}"; + return use_ndd ? "sal{l}\t{%2, %1, %k0|%k0, %1, %2}" + : "sal{l}\t{%2, %k0|%k0, %2}"; } } [(set_attr "isa" "*,apx_ndd") @@ -16849,9 +16789,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "mode" "SI")]) @@ -16865,9 +16803,7 @@ (clobber (match_scratch:SWI 0 "=<r>,r"))] "(optimize_function_for_size_p (cfun) || !TARGET_PARTIAL_FLAG_REG_STALL - || (operands[2] == const1_rtx - && (TARGET_SHIFT1 - || TARGET_DOUBLE_WITH_ADD))) + || operands[2] == const1_rtx) && ix86_match_ccmode (insn, CCGOCmode)" { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; @@ -16877,14 +16813,9 @@ gcc_assert (operands[2] == const1_rtx); return "add{<imodesuffix>}\t%0, %0"; - default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "sal{<imodesuffix>}\t%0"; - else - return use_ndd ? "sal{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "sal{<imodesuffix>}\t{%2, %0|%0, %2}"; + default: + return use_ndd ? "sal{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "sal{<imodesuffix>}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,apx_ndd") @@ -16901,9 +16832,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "mode" "<MODE>")]) @@ -16933,11 +16862,7 @@ return "add{b}\t%h0, %h0"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) - return "sal{b}\t%h0"; - else - return "sal{b}\t{%2, %h0|%h0, %2}"; + return "sal{b}\t{%2, %h0|%h0, %2}"; } } "reload_completed @@ -16967,9 +16892,7 @@ (if_then_else (ior (eq_attr "type" "alu") (and (eq_attr "type" "ishift") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))))) + (match_operand 2 "const1_operand"))) (const_string "0") (const_string "*"))) (set_attr "mode" "QI")]) @@ -17746,22 +17669,15 @@ return "#"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "sar{<imodesuffix>}\t%0"; - else - return use_ndd ? "<nf_prefix>sar{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>sar{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "<nf_prefix>sar{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>sar{<imodesuffix>}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,bmi2,apx_ndd") (set_attr "type" "ishift,ishiftx,ishift") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -17809,23 +17725,16 @@ return "#"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "shr{<imodesuffix>}\t%0"; - else - return use_ndd ? "<nf_prefix>shr{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>shr{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "<nf_prefix>shr{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>shr{<imodesuffix>}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,bmi2,avx512bw,apx_ndd") (set_attr "type" "ishift,ishiftx,msklog,ishift") (set (attr "length_immediate") (if_then_else - (and (and (match_operand 2 "const1_operand") - (eq_attr "alternative" "0")) - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (and (eq_attr "type" "ishift") + (match_operand 2 "const1_operand")) (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -17898,27 +17807,20 @@ switch (get_attr_type (insn)) { case TYPE_ISHIFTX: - return "#"; - case TYPE_MSKLOG: return "#"; + default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "<shift>{l}\t%k0"; - else - return use_ndd ? "<shift>{l}\t{%2, %1, %k0|%k0, %1, %2}" - : "<shift>{l}\t{%2, %k0|%k0, %2}"; + return use_ndd ? "<shift>{l}\t{%2, %1, %k0|%k0, %1, %2}" + : "<shift>{l}\t{%2, %k0|%k0, %2}"; } } [(set_attr "isa" "*,bmi2,apx_ndd,avx512bw") (set_attr "type" "ishift,ishiftx,ishift,msklog") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (and (eq_attr "type" "ishift") + (match_operand 2 "const1_operand")) (const_string "0") (const_string "*"))) (set_attr "mode" "SI") @@ -17949,21 +17851,15 @@ && <nf_condition>" { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "sar{<imodesuffix>}\t%0"; - else - return use_ndd ? "<nf_prefix>sar{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>sar{<imodesuffix>}\t{%2, %0|%0, %2}"; + + return use_ndd ? "<nf_prefix>sar{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>sar{<imodesuffix>}\t{%2, %0|%0, %2}"; } [(set_attr "isa" "*, apx_ndd") (set_attr "type" "ishift") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -17980,28 +17876,20 @@ bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; switch (get_attr_type (insn)) { - case TYPE_ISHIFT: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "shr{b}\t%0"; - else - return use_ndd ? "<nf_prefix>shr{b}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>shr{b}\t{%2, %0|%0, %2}"; case TYPE_MSKLOG: return "#"; + default: - gcc_unreachable (); + return use_ndd ? "<nf_prefix>shr{b}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>shr{b}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,avx512dq,apx_ndd") (set_attr "type" "ishift,msklog,ishift") (set (attr "length_immediate") (if_then_else - (and (and (match_operand 2 "const1_operand") - (eq_attr "alternative" "0")) - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (and (eq_attr "type" "ishift") + (match_operand 2 "const1_operand")) (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -18018,28 +17906,20 @@ bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; switch (get_attr_type (insn)) { - case TYPE_ISHIFT: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "shr{w}\t%0"; - else - return use_ndd ? "<nf_prefix>shr{w}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix>shr{w}\t{%2, %0|%0, %2}"; case TYPE_MSKLOG: return "#"; + default: - gcc_unreachable (); + return use_ndd ? "<nf_prefix>shr{w}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix>shr{w}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*, avx512f, apx_ndd") (set_attr "type" "ishift,msklog,ishift") (set (attr "length_immediate") (if_then_else - (and (and (match_operand 2 "const1_operand") - (eq_attr "alternative" "0")) - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (and (eq_attr "type" "ishift") + (match_operand 2 "const1_operand")) (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -18056,11 +17936,7 @@ if (which_alternative) return "#"; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) - return "<shift>{<imodesuffix>}\t%0"; - else - return "<shift>{<imodesuffix>}\t{%2, %0|%0, %2}"; + return "<shift>{<imodesuffix>}\t{%2, %0|%0, %2}"; } "&& reload_completed && !(rtx_equal_p (operands[0], operands[1]))" @@ -18073,9 +17949,7 @@ [(set_attr "type" "ishift") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "mode" "<MODE>")]) @@ -18094,27 +17968,19 @@ (any_shiftrt:SWI (match_dup 1) (match_dup 2)))] "(optimize_function_for_size_p (cfun) || !TARGET_PARTIAL_FLAG_REG_STALL - || (operands[2] == const1_rtx - && TARGET_SHIFT1)) + || operands[2] == const1_rtx) && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands, TARGET_APX_NDD)" { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "<shift>{<imodesuffix>}\t%0"; - else - return use_ndd ? "<shift>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<shift>{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "<shift>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<shift>{<imodesuffix>}\t{%2, %0|%0, %2}"; } [(set_attr "isa" "*,apx_ndd") (set_attr "type" "ishift") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "mode" "<MODE>")]) @@ -18130,27 +17996,19 @@ "TARGET_64BIT && (optimize_function_for_size_p (cfun) || !TARGET_PARTIAL_FLAG_REG_STALL - || (operands[2] == const1_rtx - && TARGET_SHIFT1)) + || operands[2] == const1_rtx) && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (<CODE>, SImode, operands, TARGET_APX_NDD)" { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "<shift>{l}\t%k0"; - else - return use_ndd ? "<shift>{l}\t{%2, %1, %k0|%k0, %1, %2}" - : "<shift>{l}\t{%2, %k0|%k0, %2}"; + return use_ndd ? "<shift>{l}\t{%2, %1, %k0|%k0, %1, %2}" + : "<shift>{l}\t{%2, %k0|%k0, %2}"; } [(set_attr "isa" "*,apx_ndd") (set_attr "type" "ishift") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "mode" "SI")]) @@ -18165,27 +18023,18 @@ (clobber (match_scratch:SWI 0 "=<r>,r"))] "(optimize_function_for_size_p (cfun) || !TARGET_PARTIAL_FLAG_REG_STALL - || (operands[2] == const1_rtx - && TARGET_SHIFT1)) + || operands[2] == const1_rtx) && ix86_match_ccmode (insn, CCGOCmode)" { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "<shift>{<imodesuffix>}\t%0"; - else - return use_ndd - ? "<shift>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<shift>{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "<shift>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<shift>{<imodesuffix>}\t{%2, %0|%0, %2}"; } [(set_attr "isa" "*,apx_ndd") (set_attr "type" "ishift") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "mode" "<MODE>")]) @@ -18208,11 +18057,7 @@ if (which_alternative) return "#"; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) - return "<shift>{b}\t%h0"; - else - return "<shift>{b}\t{%2, %h0|%h0, %2}"; + return "<shift>{b}\t{%2, %h0|%h0, %2}"; } "reload_completed && !(rtx_equal_p (operands[0], operands[1]))" @@ -18234,9 +18079,7 @@ [(set_attr "type" "ishift") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "mode" "QI")]) @@ -18928,13 +18771,8 @@ return "#"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "<rotate>{<imodesuffix>}\t%0"; - else - return use_ndd ? "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,bmi2,apx_ndd") @@ -18946,9 +18784,7 @@ (set (attr "length_immediate") (if_then_else (and (eq_attr "type" "rotate") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)")))) + (match_operand 2 "const1_operand")) (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -19039,13 +18875,8 @@ return "#"; default: - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "<rotate>{l}\t%k0"; - else - return use_ndd ? "<rotate>{l}\t{%2, %1, %k0|%k0, %1, %2}" - : "<rotate>{l}\t{%2, %k0|%k0, %2}"; + return use_ndd ? "<rotate>{l}\t{%2, %1, %k0|%k0, %1, %2}" + : "<rotate>{l}\t{%2, %k0|%k0, %2}"; } } [(set_attr "isa" "*,bmi2,apx_ndd") @@ -19057,9 +18888,7 @@ (set (attr "length_immediate") (if_then_else (and (eq_attr "type" "rotate") - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)")))) + (match_operand 2 "const1_operand")) (const_string "0") (const_string "*"))) (set_attr "mode" "SI")]) @@ -19100,22 +18929,14 @@ && <nf_condition>" { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd && !<nf_applied>) - return "<rotate>{<imodesuffix>}\t%0"; - else - return use_ndd - ? "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" - : "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %0|%0, %2}"; + return use_ndd ? "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}" + : "<nf_prefix><rotate>{<imodesuffix>}\t{%2, %0|%0, %2}"; } [(set_attr "isa" "*,apx_ndd") (set_attr "type" "rotate") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "has_nf" "1") @@ -19132,11 +18953,7 @@ if (which_alternative) return "#"; - if (operands[2] == const1_rtx - && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) - return "<rotate>{<imodesuffix>}\t%0"; - else - return "<rotate>{<imodesuffix>}\t{%2, %0|%0, %2}"; + return "<rotate>{<imodesuffix>}\t{%2, %0|%0, %2}"; } "&& reload_completed && !(rtx_equal_p (operands[0], operands[1]))" @@ -19149,9 +18966,7 @@ [(set_attr "type" "rotate") (set (attr "length_immediate") (if_then_else - (and (match_operand 2 "const1_operand") - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)"))) + (match_operand 2 "const1_operand") (const_string "0") (const_string "*"))) (set_attr "mode" "<MODE>")]) @@ -19211,20 +19026,12 @@ "" { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; - if ((TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) - return "<shift>{<imodesuffix>}\t%0"; return use_ndd ? "<shift>{<imodesuffix>}\t{$1, %1, %0|%0, %1, 1}" : "<shift>{<imodesuffix>}\t{$1, %0|%0, 1}"; } [(set_attr "isa" "*, apx_ndd") (set_attr "type" "ishift1") - (set (attr "length_immediate") - (if_then_else - (ior (match_test "TARGET_SHIFT1") - (match_test "optimize_function_for_size_p (cfun)")) - (const_string "0") - (const_string "*"))) + (set_attr "length_immediate" "0") (set_attr "mode" "<MODE>")]) ;; Bit set / bit test instructions diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index f5d9cd601c7d..04036ff04b53 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -682,10 +682,6 @@ DEF_TUNE (X86_TUNE_ALWAYS_FANCY_MATH_387, "always_fancy_math_387", is bad. */ DEF_TUNE (X86_TUNE_UNROLL_STRLEN, "unroll_strlen", ~m_386) -/* X86_TUNE_SHIFT1: Enables use of short encoding of "sal reg" instead of - longer "sal $1, reg". */ -DEF_TUNE (X86_TUNE_SHIFT1, "shift1", ~m_486) - /* X86_TUNE_ZERO_EXTEND_WITH_AND: Use AND instruction instead of mozbl/movwl. */ DEF_TUNE (X86_TUNE_ZERO_EXTEND_WITH_AND, "zero_extend_with_and",
