https://gcc.gnu.org/g:82d9668ca6950419b1b00c0c4f8c9a87b6071051
commit r17-635-g82d9668ca6950419b1b00c0c4f8c9a87b6071051 Author: Xi Ruoyao <[email protected]> Date: Mon May 18 22:59:33 2026 +0800 LoongArch: Rename rbit<mode> to bitreverse<mode>2 [PR 50481] r17-523 has added the __builtin_bitreverse{8,16,32,64} builtins and established that the standard optab names for them are bitreverse<mode>2. Rename the rbit<mode> expanders so they'll be used for those builtins. r17-567 has already removed the uses of rbit<mode> so the old names do not need to be kept. PR target/50481 gcc/ * config/loongarch/loongarch.md (@rbit<GPR:mode>2): Rename to ... (@bitreverse<mode>2): ... this. (rbithi2): Rename to ... (bitreversehi2): ... this. (rbitqi2): Rename to ... (bitreverseqi2): ... this. (rbitsi_extended): Rename to ... (bitreversesi2_extended): ... this. gcc/testsuite/ * gcc.target/loongarch/la64/bitreverse.c: New test. Diff: --- gcc/config/loongarch/loongarch.md | 17 +++-- .../gcc.target/loongarch/la64/bitreverse.c | 73 ++++++++++++++++++++++ 2 files changed, 81 insertions(+), 9 deletions(-) diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 297c7e414921..fe6d28e76161 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -4741,7 +4741,7 @@ [(set_attr "type" "unknown") (set_attr "mode" "DI")]) -(define_insn "@rbit<mode>" +(define_insn "@bitreverse<mode>2" [(set (match_operand:GPR 0 "register_operand" "=r") (bitreverse:GPR (match_operand:GPR 1 "register_operand" "r")))] "TARGET_64BIT || TARGET_32BIT_S" @@ -4749,7 +4749,7 @@ [(set_attr "type" "unknown") (set_attr "mode" "<MODE>")]) -(define_insn "rbitsi_extended" +(define_insn "bitreversesi2_extended" [(set (match_operand:DI 0 "register_operand" "=r") (sign_extend:DI (bitreverse:SI (match_operand:SI 1 "register_operand" "r"))))] @@ -4760,7 +4760,7 @@ ;; If we don't care high bits, bitrev.4b can reverse bits of values in ;; QImode. -(define_insn "rbitqi" +(define_insn "bitreverseqi2" [(set (match_operand:QI 0 "register_operand" "=r") (bitreverse:QI (match_operand:QI 1 "register_operand" "r")))] "TARGET_64BIT || TARGET_32BIT_S" @@ -4768,18 +4768,17 @@ [(set_attr "type" "unknown") (set_attr "mode" "SI")]) -;; For HImode it's a little complicated... -(define_expand "rbithi" - [(match_operand:HI 0 "register_operand") - (match_operand:HI 1 "register_operand")] +(define_expand "bitreversehi2" + [(set (match_operand:HI 0 "register_operand" "=r") + (bitreverse:HI (match_operand:HI 1 "register_operand" "r")))] "" { rtx t = gen_reg_rtx (word_mode); /* Oh, using paradoxical subreg. I learnt the trick from RISC-V, hoping we won't be blown up altogether one day. */ - emit_insn (gen_rbit(word_mode, t, - gen_lowpart (word_mode, operands[1]))); + emit_insn (gen_bitreverse2 (word_mode, t, + gen_lowpart (word_mode, operands[1]))); t = expand_simple_binop (word_mode, LSHIFTRT, t, GEN_INT (GET_MODE_BITSIZE (word_mode) - 16), NULL_RTX, false, OPTAB_DIRECT); diff --git a/gcc/testsuite/gcc.target/loongarch/la64/bitreverse.c b/gcc/testsuite/gcc.target/loongarch/la64/bitreverse.c new file mode 100644 index 000000000000..c59bb5b6df77 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/la64/bitreverse.c @@ -0,0 +1,73 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +/* +** t1: +** bitrev\.d \$r4,\$r4 +** jr \$r1 +*/ +long +t1 (long x) +{ + return __builtin_bitreverse64 (x); +} + +/* +** t2: +** bitrev\.w \$r4,\$r4 +** jr \$r1 +*/ +int +t2 (int x) +{ + return __builtin_bitreverse32 (x); +} + +/* +** t3: +** bitrev\.d (\$r[0-9]+),\$r4 +** srai\.d \$r4,\1,48 +** jr \$r1 +*/ +short +t3 (short x) +{ + return __builtin_bitreverse16 (x); +} + +/* +** t4: +** bitrev\.4b (\$r[0-9]+),\$r4 +** ext\.w\.b \$r4,\1 +** jr \$r1 +*/ +char +t4 (char x) +{ + return __builtin_bitreverse8 (x); +} + +/* +** t5: +** bitrev\.d (\$r[0-9]+),\$r4 +** srli\.d \$r4,\1,48 +** jr \$r1 +*/ +unsigned short +t5 (short x) +{ + return __builtin_bitreverse16 (x); +} + +/* +** t6: +** bitrev\.4b (\$r[0-9]+),\$r4 +** bstrpick\.w \$r4,\1,7,0 +** jr \$r1 +*/ +unsigned char +t6 (char x) +{ + return __builtin_bitreverse8 (x); +}
