https://gcc.gnu.org/g:32018c4574210f68337d3c3568545b7d4444d19f
commit r17-1100-g32018c4574210f68337d3c3568545b7d4444d19f Author: Dhruv Chawla <[email protected]> Date: Tue May 19 12:57:47 2026 +0000 csky: Fix typos in csky.cc Signed-off-by: Dhruv Chawla <[email protected]> gcc/ChangeLog: * config/csky/csky.cc (csky_output_inline_const): Fix typos. (emit_csky_regs_pop): Likewise. (csky_return_in_memory): Likewise. Diff: --- gcc/config/csky/csky.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/csky/csky.cc b/gcc/config/csky/csky.cc index 0de00e63d67b..be33a50b806c 100644 --- a/gcc/config/csky/csky.cc +++ b/gcc/config/csky/csky.cc @@ -3922,7 +3922,7 @@ csky_output_inline_const (machine_mode mode, rtx operands[]) off to an lrw rather than calling this routine. */ gcc_assert (trick_type != IC_UNINLINABLE); - /* Operands: 0 = dst, 1 = load immedate., 2 = adjust immedate. */ + /* Operands: 0 = dst, 1 = load immediate., 2 = adjust immediate. */ out_operands[0] = operands[0]; out_operands[1] = GEN_INT (x); if (trick_type != IC_SINGLE && trick_type != IC_APPEND_NOT) @@ -5637,7 +5637,7 @@ emit_csky_regs_pop (unsigned long mask) (set (reg:SI 'first reg number') (unspec:SI [(mem)] UNSPEC_PUSHPOP_MULT), the rest elements is (use (reg:SI 'rest reg number')), - so the length should be number of register to be poped + so the length should be number of register to be popped plus one. */ par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (num_regs + 1)); @@ -7081,7 +7081,7 @@ csky_return_in_memory (const_tree type, /* Implement TARGET_DWARF_REGISTER_SPAN. Dwarf models VFP registers as 64-bit or 128-bit registers default. - GCC models tham as 32-bit registers, so we need to describe this to + GCC models them as 32-bit registers, so we need to describe this to the DWARF generation code. Other registers can use the default. */ static rtx
