https://gcc.gnu.org/g:d53694ffbaeaa6202529ed6820a15b70fca290e8
commit r17-1137-gd53694ffbaeaa6202529ed6820a15b70fca290e8 Author: Dhruv Chawla <[email protected]> Date: Wed May 27 12:28:38 2026 +0000 Re-flow lines made longer than 80 characters by typo fixes Signed-off-by: Dhruv Chawla <[email protected]> gcc/ChangeLog: * config/arm/arm-mve-builtins-shapes.cc (struct viddup_def): Re-flow comment. (struct vidwdup_def): Likewise. * config/arm/arm.cc (arm_mve_check_reg_origin_is_num_elems): Likewise. * config/loongarch/sync.md: Likewise. * config/microblaze/microblaze.cc (compute_frame_size): Likewise. * config/rs6000/rs6000-call.cc (rs6000_gimplify_va_arg): Likewise. Diff: --- gcc/config/arm/arm-mve-builtins-shapes.cc | 8 ++++---- gcc/config/arm/arm.cc | 6 +++--- gcc/config/loongarch/sync.md | 4 ++-- gcc/config/microblaze/microblaze.cc | 3 ++- gcc/config/rs6000/rs6000-call.cc | 3 ++- 5 files changed, 13 insertions(+), 11 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc b/gcc/config/arm/arm-mve-builtins-shapes.cc index adc0dfc97843..31dbe6256f03 100644 --- a/gcc/config/arm/arm-mve-builtins-shapes.cc +++ b/gcc/config/arm/arm-mve-builtins-shapes.cc @@ -2858,8 +2858,8 @@ struct viddup_def : public overloaded_base<0> return error_mark_node; type_suffix = r.type_suffix_ids[0]; - /* With PRED_m, there is no type suffix, so infer it from the first (inactive) - argument. */ + /* With PRED_m, there is no type suffix, so infer it from the first + (inactive) argument. */ if (type_suffix == NUM_TYPE_SUFFIXES) type_suffix = r.infer_vector_type (0); @@ -2943,8 +2943,8 @@ struct vidwdup_def : public overloaded_base<0> return error_mark_node; type_suffix = r.type_suffix_ids[0]; - /* With PRED_m, there is no type suffix, so infer it from the first (inactive) - argument. */ + /* With PRED_m, there is no type suffix, so infer it from the first + (inactive) argument. */ if (type_suffix == NUM_TYPE_SUFFIXES) type_suffix = r.infer_vector_type (0); diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index d08431422ada..3a39eabb1bb3 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -34836,9 +34836,9 @@ arm_mve_check_reg_origin_is_num_elems (loop *loop, rtx reg, rtx vctp_step, if (DF_REG_DEF_COUNT (REGNO (reg)) > 2) return false; - /* Look for a single definition of REG going into the loop. The DEF_CHAIN will - have at least two values, as this is a loop induction variable that is - defined outside the loop. */ + /* Look for a single definition of REG going into the loop. The DEF_CHAIN + will have at least two values, as this is a loop induction variable that + is defined outside the loop. */ for (df_ref def = DF_REG_DEF_CHAIN (REGNO (reg)); def; def = DF_REF_NEXT_REG (def)) diff --git a/gcc/config/loongarch/sync.md b/gcc/config/loongarch/sync.md index c7692412331b..a36c53a1687e 100644 --- a/gcc/config/loongarch/sync.md +++ b/gcc/config/loongarch/sync.md @@ -74,8 +74,8 @@ ;; [1]: https://git.kernel.org/torvalds/c/e031a5f3f1ed ;; ;; Implementations without support for the finer-granularity hints simply treat -;; all as the full barrier (DBAR 0), so we can unconditionally start emitting the -;; more precise hints right away. +;; all as the full barrier (DBAR 0), so we can unconditionally start emitting +;; the more precise hints right away. (define_insn "mem_thread_fence_1" [(set (match_operand:BLK 0 "" "") (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER)) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc index 82fa18b4235c..63d8064f93f8 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc @@ -2147,7 +2147,8 @@ compute_frame_size (HOST_WIDE_INT size) HOST_WIDE_INT var_size; /* # bytes that local variables take up. */ HOST_WIDE_INT args_size; /* # bytes that outgoing arguments take up. */ int link_debug_size; /* # bytes for link register. */ - HOST_WIDE_INT gp_reg_size; /* # bytes needed to store callee-saved gp regs. */ + HOST_WIDE_INT gp_reg_size; /* # bytes needed to store callee-saved gp + regs. */ long mask; /* mask of saved gp registers. */ interrupt_handler = diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc index 85d270ccf00e..b9b791bfe8ae 100644 --- a/gcc/config/rs6000/rs6000-call.cc +++ b/gcc/config/rs6000/rs6000-call.cc @@ -2572,7 +2572,8 @@ rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, std_gimplify_va_arg_expr that carries out the align adjust, for the case of relevance. We don't need to check for pass-by-reference because of the test above. - We can return a simplified answer, since we know there's no offset to add. */ + We can return a simplified answer, since we know there's no offset to + add. */ if (((TARGET_MACHO && rs6000_darwin64_abi)
