https://gcc.gnu.org/g:a2fadd5c2c5c030c493dfccf3b3cf38e7e46144b
commit r17-1425-ga2fadd5c2c5c030c493dfccf3b3cf38e7e46144b Author: Alfie Richards <[email protected]> Date: Tue Nov 4 11:16:55 2025 +0000 aarch64: Update gating for svexpa intrinsic Updates the gating for the ssve-fexpa intrinsic to be supported in streaming-mode if "ssve-fexpa" is supported. Additionally, implements the "__ARM_FEATURE_SSVE_FEXPA" macro. gcc/ChangeLog: * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add __ARM_FEATURE_SSVE_FEXPA. * config/aarch64/aarch64-sve-builtins-base.def (svexpa): Change gating to streaming compatible if AARCH64_FL_SSVE_FEXPA is supported. * config/aarch64/aarch64-sve.md: Update gating to be enabled if TARGET_SSVE_FEXPA. * config/aarch64/aarch64.h (TARGET_SVE_FEXPA): New macro. * config/aarch64/iterators.md (SVE_FP_UNARY_INT): Update FEXPA gating. gcc/testsuite/ChangeLog: * gcc.target/aarch64/pragma_cpp_predefs_4.c: Add __ARM_FEATURE_SSVE_FEXPA test. * gcc.target/aarch64/sve/acle/asm/expa_f16.c: Add streaming mode test. * gcc.target/aarch64/sve/acle/asm/expa_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/expa_f64.c: Likewise. * lib/target-supports.exp (sve_ext): Add ssve-fexpa support test. * g++.target/aarch64/sve/aarch64-ssve.exp (GCC target pragma): Add ssve-fexpa. (streaming_ok): Add svexpa. (nonstreaming_only) Remove svexpa. Diff: --- gcc/config/aarch64/aarch64-c.cc | 2 ++ gcc/config/aarch64/aarch64-sve-builtins-base.def | 5 ++++- gcc/config/aarch64/aarch64-sve.md | 2 +- gcc/config/aarch64/aarch64.h | 6 ++++++ gcc/config/aarch64/iterators.md | 2 +- gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp | 4 ++-- gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c | 5 +++++ gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c | 7 ++++++- gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c | 7 ++++++- gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c | 7 ++++++- gcc/testsuite/lib/target-supports.exp | 2 +- 11 files changed, 40 insertions(+), 9 deletions(-) diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc index f148bdd39798..5a48406dddd0 100644 --- a/gcc/config/aarch64/aarch64-c.cc +++ b/gcc/config/aarch64/aarch64-c.cc @@ -317,6 +317,8 @@ aarch64_update_cpp_builtins (cpp_reader *pfile) aarch64_def_or_undef (TARGET_SME2p2, "__ARM_FEATURE_SME2p2", pfile); aarch64_def_or_undef (TARGET_FAMINMAX, "__ARM_FEATURE_FAMINMAX", pfile); aarch64_def_or_undef (TARGET_PCDPHINT, "__ARM_FEATURE_PCDPHINT", pfile); + aarch64_def_or_undef (AARCH64_HAVE_ISA (SSVE_FEXPA), + "__ARM_FEATURE_SSVE_FEXPA", pfile); // Function multi-versioning defines aarch64_def_or_undef (targetm.has_ifunc_p (), diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.def b/gcc/config/aarch64/aarch64-sve-builtins-base.def index c1e00a51b7b4..3b5e2433674c 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-base.def +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.def @@ -274,7 +274,6 @@ DEF_SVE_FUNCTION (svadrb, adr_offset, none, none) DEF_SVE_FUNCTION (svadrd, adr_index, none, none) DEF_SVE_FUNCTION (svadrh, adr_index, none, none) DEF_SVE_FUNCTION (svadrw, adr_index, none, none) -DEF_SVE_FUNCTION (svexpa, unary_uint, all_float, none) DEF_SVE_FUNCTION (svld1_gather, load_gather_sv, sd_data, implicit) DEF_SVE_FUNCTION (svld1_gather, load_gather_vs, sd_data, implicit) DEF_SVE_FUNCTION (svld1sb_gather, load_ext_gather_offset, sd_integer, implicit) @@ -377,3 +376,7 @@ DEF_SVE_FUNCTION (svzip2q, binary, all_data, none) #define REQUIRED_EXTENSIONS sve_and_sme (0, AARCH64_FL_SME2p2) DEF_SVE_FUNCTION (svcompact, unary, sd_data, implicit) #undef REQUIRED_EXTENSIONS + +#define REQUIRED_EXTENSIONS streaming_compatible (0, AARCH64_FL_SSVE_FEXPA) +DEF_SVE_FUNCTION (svexpa, unary_uint, all_float, none) +#undef REQUIRED_EXTENSIONS diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 1468ecbc45cf..9523b75441c4 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -3950,7 +3950,7 @@ (unspec:SVE_FULL_F [(match_operand:<V_INT_EQUIV> 1 "register_operand" "w")] SVE_FP_UNARY_INT))] - "TARGET_SVE" + "TARGET_SVE_FEXPA" "<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>" [(set_attr "sve_type" "sve_fp_exp")] ) diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 538fb4a8e365..45467991f26c 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -577,6 +577,12 @@ through +ssve-fp8dot2. */ #define TARGET_SSME2_FP8 (TARGET_FP8 && TARGET_STREAMING_SME2) +/* SVE FEXPA instructions, enabled through +sve for streaming and +ssve-fexpa + for streaming. */ +#define TARGET_SVE_FEXPA ((TARGET_SVE || TARGET_STREAMING) \ + && (AARCH64_HAVE_ISA (SSVE_FEXPA) \ + || TARGET_NON_STREAMING)) + /* Standard register usage. */ /* 31 64-bit general purpose registers R0-R30: diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 9adbf04c3405..948dcefa63e9 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -3720,7 +3720,7 @@ ;; This might need to be revisited if new operations are added in future. (define_int_iterator SVE_FP_UNARY [UNSPEC_FRECPE UNSPEC_RSQRTE]) -(define_int_iterator SVE_FP_UNARY_INT [(UNSPEC_FEXPA "TARGET_NON_STREAMING")]) +(define_int_iterator SVE_FP_UNARY_INT [UNSPEC_FEXPA]) (define_int_iterator SVE_INT_SHIFT_IMM [UNSPEC_ASRD (UNSPEC_SQSHLU "TARGET_SVE2") diff --git a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp index eea25abb93b7..3eab02c0d146 100644 --- a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp +++ b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp @@ -37,7 +37,7 @@ gcc_parallel_test_enable 0 set preamble { #include <arm_sve.h> -#pragma GCC target "+i8mm+f32mm+f64mm+sve2+sve2-sm4+sve2-aes+sve2-sha3+sme+sme2p2+ssve-bitperm" +#pragma GCC target "+i8mm+f32mm+f64mm+sve2+sve2-sm4+sve2-aes+sve2-sha3+sme+sme2p2+ssve-bitperm+ssve-fexpa" extern svbool_t &pred; @@ -149,6 +149,7 @@ set streaming_ok { u8 = svbdep (u8, u8) u8 = svbext (u8, u8) u8 = svbgrp (u8, u8) + f32 = svexpa (u32) } # This order follows the list in the SME manual. @@ -167,7 +168,6 @@ set nonstreaming_only { u8 = svaesmc (u8) f32 = svbfmmla (f32, bf16, bf16) f32 = svadda (pred, 1.0f, f32) - f32 = svexpa (u32) f32 = svmmla (f32, f32, f32) f32 = svtmad (f32, f32, 0) f32 = svtsmul (f32, u32) diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c index 04e3ae5d6aaa..fd85b40cc8d5 100644 --- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c +++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c @@ -383,3 +383,8 @@ #ifndef __ARM_FEATURE_FAMINMAX #error Foo #endif + +#pragma GCC target "arch=armv8-a+sve2+ssve-fexpa" +#ifndef __ARM_FEATURE_SSVE_FEXPA +#error Foo +#endif diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c index 87c26e6ea6bd..5a952d8758da 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c @@ -1,8 +1,13 @@ -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */ +/* { dg-do assemble { target aarch64_asm_ssve-fexpa_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_ssve-fexpa_ok } } } */ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ #include "test_sve_acle.h" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+ssve-fexpa" +#endif + /* ** expa_f16_tied1: ** fexpa z0\.h, z0\.h diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c index 5e9839537c70..4d0cf51f8627 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c @@ -1,8 +1,13 @@ -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */ +/* { dg-do assemble { target aarch64_asm_ssve-fexpa_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_ssve-fexpa_ok } } } */ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ #include "test_sve_acle.h" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+ssve-fexpa" +#endif + /* ** expa_f32_tied1: ** fexpa z0\.s, z0\.s diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c index b117df2a4b1e..f16338859f96 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c @@ -1,8 +1,13 @@ -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */ +/* { dg-do assemble { target aarch64_asm_ssve-fexpa_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_ssve-fexpa_ok } } } */ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ #include "test_sve_acle.h" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+ssve-fexpa" +#endif + /* ** expa_f64_tied1: ** fexpa z0\.d, z0\.d diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index adbaf7d53d07..009f22f9b30b 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -12841,7 +12841,7 @@ set exts { "sme-f8f16" "sme-f8f32" "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1" "sme2p2" "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma" "sve-bfscale" "sme-lutv2" - "ssve-bitperm" + "ssve-fexpa" "ssve-bitperm" } foreach { aarch64_ext } $exts {
