https://gcc.gnu.org/g:b3212445035f2ce61bb1e1f296dafd2ea238a12b
commit r17-1986-gb3212445035f2ce61bb1e1f296dafd2ea238a12b Author: Robin Dapp <[email protected]> Date: Mon Jun 29 18:46:01 2026 -0600 RISC-V: Add scalar-mode handling to vector misalignment hook [PR125994]. Hi, Julien reported that we don't peel for alignment anymore after my vector-misalignment changes last year. Indeed, I didn't consider the "scalar vectorization" case for slow-misaligned targets. We fail to perform peeling for alignment and instead emit byte accesses. This patch now only returns true (=misalignment supported) if misaligned scalar accesses are not slow. Regtested on rv64gcv_zvl512b. Going to wait for the CI before moving forward. Reported-by: Julien Thillard <[email protected]> Regards Robin PR target/125994 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_support_vector_misalignment): Handle scalar modes. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr125994.c: New test. Diff: --- gcc/config/riscv/riscv.cc | 5 +++++ gcc/testsuite/gcc.target/riscv/rvv/autovec/pr125994.c | 16 ++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index dda17887019d..c2d64f63c491 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -13372,6 +13372,11 @@ bool riscv_support_vector_misalignment (machine_mode mode, int misalignment, bool is_packed, bool is_gather_scatter) { + /* For vectorization in scalar registers, consider slow unaligned + access. */ + if (!riscv_vector_mode_p (mode)) + return !riscv_slow_unaligned_access_p; + /* IS_PACKED is true if the corresponding scalar element is not naturally aligned. If the misalignment is unknown and the access is packed we defer to the default hook which will check if movmisalign is present. diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr125994.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr125994.c new file mode 100644 index 000000000000..10f232dd1e4e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr125994.c @@ -0,0 +1,16 @@ +/* { dg-compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-tree-vect-details" } */ + +#include <stdint.h> + +void +AddWithIv (uint8_t *buf, uint8_t *Iv, uint64_t size) +{ + uint64_t i; + for (i = 0; i < size; ++i) + { + buf[i] += Iv[i]; + } +} + +/* { dg-final { scan-tree-dump "Both peeling and versioning will be applied." "vect" } } */
