https://gcc.gnu.org/g:fa103e35dbb574a4f8f8e1004cb91f763f3336b0
commit r17-2094-gfa103e35dbb574a4f8f8e1004cb91f763f3336b0 Author: Sivan Shani <[email protected]> Date: Thu Jul 2 13:10:18 2026 +0000 AArch64: Enable SVE AES instructions in streaming mode with FEAT_SSVE_AES FEAT_SSVE_AES makes the existing SVE AES instructions (AESE, AESD, AESMC, AESIMC) available in Streaming SVE mode. gcc/ChangeLog: * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Check for SVE2 and SVE_AES directly. * config/aarch64/aarch64-sve-builtins-sve2.def (REQUIRED_EXTENSIONS): Make AES builtins streaming-compatible with SSVE AES. * config/aarch64/aarch64-sve2.md: Use TARGET_SVE_AES instead of TARGET_SVE2_AES. * config/aarch64/aarch64.h (TARGET_SVE2_AES): Rename to... (TARGET_SVE_AES): Add support for SSVE AES. * config/aarch64/iterators.md: Use TARGET_SVE2 for VNx2DI PMULL pair mode. gcc/testsuite/ChangeLog: * g++.target/aarch64/sve/aarch64-ssve.exp: Test SVE AES intrinsics as streaming-compatible with +ssve-aes. * gcc.target/aarch64/sve2/acle/asm/aesd_u8.c: Use +ssve-aes for streaming-compatible tests. * gcc.target/aarch64/sve2/acle/asm/aese_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c: Likewise. * lib/target-supports.exp: Test aes intrinsics in streaming mode. Diff: --- gcc/config/aarch64/aarch64-c.cc | 3 ++- gcc/config/aarch64/aarch64-sve-builtins-sve2.def | 5 +++-- gcc/config/aarch64/aarch64-sve2.md | 8 ++++---- gcc/config/aarch64/aarch64.h | 10 ++++++---- gcc/config/aarch64/iterators.md | 2 +- gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp | 14 +++++++------- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c | 7 ++++++- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c | 7 ++++++- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c | 7 ++++++- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c | 7 ++++++- gcc/testsuite/lib/target-supports.exp | 2 +- 11 files changed, 48 insertions(+), 24 deletions(-) diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc index b809dbea51ae..c4ddcc6d717d 100644 --- a/gcc/config/aarch64/aarch64-c.cc +++ b/gcc/config/aarch64/aarch64-c.cc @@ -225,7 +225,8 @@ aarch64_update_cpp_builtins (cpp_reader *pfile) && (AARCH64_HAVE_ISA (SVE2) || TARGET_SME2), "__ARM_FEATURE_SVE_B16B16", pfile); aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE2), "__ARM_FEATURE_SVE2", pfile); - aarch64_def_or_undef (TARGET_SVE2_AES, "__ARM_FEATURE_SVE2_AES", pfile); + aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE2) && AARCH64_HAVE_ISA (SVE_AES), + "__ARM_FEATURE_SVE2_AES", pfile); aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE_BITPERM) && AARCH64_HAVE_ISA (SVE2), "__ARM_FEATURE_SVE2_BITPERM", pfile); diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sve2.def b/gcc/config/aarch64/aarch64-sve-builtins-sve2.def index 1a55de890cf4..16524cfedab0 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-sve2.def +++ b/gcc/config/aarch64/aarch64-sve-builtins-sve2.def @@ -195,8 +195,9 @@ DEF_SVE_FUNCTION (svstnt1w_scatter, store_scatter_index_restricted, d_integer, i DEF_SVE_FUNCTION (svstnt1w_scatter, store_scatter_offset_restricted, d_integer, implicit) #undef REQUIRED_EXTENSIONS -#define REQUIRED_EXTENSIONS nonstreaming_sve (AARCH64_FL_SVE2 \ - | AARCH64_FL_SVE_AES) +#define REQUIRED_EXTENSIONS streaming_compatible (AARCH64_FL_SVE2 \ + | AARCH64_FL_SVE_AES, \ + AARCH64_FL_SSVE_AES) DEF_SVE_FUNCTION (svaesd, binary, b_unsigned, none) DEF_SVE_FUNCTION (svaese, binary, b_unsigned, none) DEF_SVE_FUNCTION (svaesimc, unary, b_unsigned, none) diff --git a/gcc/config/aarch64/aarch64-sve2.md b/gcc/config/aarch64/aarch64-sve2.md index 90a0402d0176..860c63460eb9 100644 --- a/gcc/config/aarch64/aarch64-sve2.md +++ b/gcc/config/aarch64/aarch64-sve2.md @@ -4732,7 +4732,7 @@ (match_operand:VNx16QI 1 "register_operand" "%0") (match_operand:VNx16QI 2 "register_operand" "w"))] CRYPTO_AES))] - "TARGET_SVE2_AES" + "TARGET_SVE_AES" "aes<aes_op>\t%0.b, %0.b, %2.b" [(set_attr "type" "crypto_aese")] ) @@ -4743,7 +4743,7 @@ (unspec:VNx16QI [(match_operand:VNx16QI 1 "register_operand" "0")] CRYPTO_AESMC))] - "TARGET_SVE2_AES" + "TARGET_SVE_AES" "aes<aesmc_op>\t%0.b, %0.b" [(set_attr "type" "crypto_aesmc")] ) @@ -4762,7 +4762,7 @@ (match_operand:VNx16QI 2 "register_operand" "w"))] UNSPEC_AESE)] UNSPEC_AESMC))] - "TARGET_SVE2_AES && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)" + "TARGET_SVE_AES && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)" "aese\t%0.b, %0.b, %2.b\;aesmc\t%0.b, %0.b" [(set_attr "type" "crypto_aese") (set_attr "length" "8")] @@ -4777,7 +4777,7 @@ (match_operand:VNx16QI 2 "register_operand" "w"))] UNSPEC_AESD)] UNSPEC_AESIMC))] - "TARGET_SVE2_AES && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)" + "TARGET_SVE_AES && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)" "aesd\t%0.b, %0.b, %2.b\;aesimc\t%0.b, %0.b" [(set_attr "type" "crypto_aese") (set_attr "length" "8")] diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index c3c61c6939c0..9031d67b50d1 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -290,10 +290,12 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED /* SVE2 instructions, enabled in non-streaming mode through +sve2. */ #define TARGET_SVE2 (AARCH64_HAVE_ISA (SVE2) || TARGET_STREAMING) -/* SVE2 AES instructions, enabled through +sve2-aes. */ -#define TARGET_SVE2_AES (AARCH64_HAVE_ISA (SVE2) \ - && AARCH64_HAVE_ISA (SVE_AES) \ - && TARGET_NON_STREAMING) +/* SVE AES instructions, enabled through +sve-aes+sve2 for non-streaming mode + and +ssve-aes for streaming mode. */ +#define TARGET_SVE_AES (AARCH64_HAVE_ISA (SVE_AES) \ + && (AARCH64_HAVE_ISA (SVE2) || TARGET_STREAMING) \ + && (AARCH64_HAVE_ISA (SSVE_AES) \ + || TARGET_NON_STREAMING)) /* SVE BITPERM instructions, enabled through +sve-bitperm+sve2 for non-streaming and +ssve-bitperm for streaming. */ diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 131b786942fa..a8b976e4b71e 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -741,7 +741,7 @@ ;; SVE integer modes that can form the input to an SVE2 PMULL[BT] instruction. (define_mode_iterator SVE2_PMULL_PAIR_I [VNx16QI VNx4SI - (VNx2DI "TARGET_SVE2_AES")]) + (VNx2DI "TARGET_SVE_AES")]) ;; Modes involved in extending or truncating SVE data, for 8 elements per ;; 128-bit block. diff --git a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp index 3eab02c0d146..2aed7043b4b3 100644 --- a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp +++ b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp @@ -37,7 +37,7 @@ gcc_parallel_test_enable 0 set preamble { #include <arm_sve.h> -#pragma GCC target "+i8mm+f32mm+f64mm+sve2+sve2-sm4+sve2-aes+sve2-sha3+sme+sme2p2+ssve-bitperm+ssve-fexpa" +#pragma GCC target "+i8mm+f32mm+f64mm+sve2+sve2-sm4+sve2-sha3+sme+sme2p2+ssve-bitperm+ssve-fexpa+ssve-aes" extern svbool_t &pred; @@ -150,6 +150,12 @@ set streaming_ok { u8 = svbext (u8, u8) u8 = svbgrp (u8, u8) f32 = svexpa (u32) + u8 = svaesd (u8, u8) + u8 = svaese (u8, u8) + u8 = svaesimc (u8) + u8 = svaesmc (u8) + u64 = svpmullb_pair (u64, u64) + u64 = svpmullt_pair (u64, u64) } # This order follows the list in the SME manual. @@ -162,10 +168,6 @@ set nonstreaming_only { u64 = svadrw_index (u64, u64) u32 = svadrd_index (u32, u32) u64 = svadrd_index (u64, u64) - u8 = svaesd (u8, u8) - u8 = svaese (u8, u8) - u8 = svaesimc (u8) - u8 = svaesmc (u8) f32 = svbfmmla (f32, bf16, bf16) f32 = svadda (pred, 1.0f, f32) f32 = svmmla (f32, f32, f32) @@ -264,8 +266,6 @@ set nonstreaming_only { u32 = svldnt1_gather_offset_u32 (pred, u32, 1) pred = svmatch (pred, u8, u8) pred = svnmatch (pred, u8, u8) - u64 = svpmullb_pair (u64, u64) - u64 = svpmullt_pair (u64, u64) svprfb_gather_offset (pred, void_ptr, u64, SV_PLDL1KEEP) svprfb_gather_offset (pred, u64, 1, SV_PLDL1KEEP) svprfd_gather_index (pred, void_ptr, u64, SV_PLDL1KEEP) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c index 65ba09471ac8..a36367e9f512 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c @@ -1,9 +1,14 @@ -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ +/* { dg-do assemble { target aarch64_asm_ssve-aes_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_ssve-aes_ok } } } */ #include "test_sve_acle.h" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+ssve-aes" +#else #pragma GCC target "+sve2-aes" +#endif /* ** aesd_u8_tied1: diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c index f902c3c1d324..86d6a534797b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c @@ -1,9 +1,14 @@ -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ +/* { dg-do assemble { target aarch64_asm_ssve-aes_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_ssve-aes_ok } } } */ #include "test_sve_acle.h" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+ssve-aes" +#else #pragma GCC target "+sve2-aes" +#endif /* ** aese_u8_tied1: diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c index dab06b79a959..ee3fbe3f86ed 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c @@ -1,9 +1,14 @@ -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ +/* { dg-do assemble { target aarch64_asm_ssve-aes_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_ssve-aes_ok } } } */ #include "test_sve_acle.h" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+ssve-aes" +#else #pragma GCC target "+sve2-aes" +#endif /* ** aesimc_u8_tied1: diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c index 7e7cc65be5dd..97f5220b9e08 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c @@ -1,9 +1,14 @@ -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ +/* { dg-do assemble { target aarch64_asm_ssve-aes_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_ssve-aes_ok } } } */ #include "test_sve_acle.h" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+ssve-aes" +#else #pragma GCC target "+sve2-aes" +#endif /* ** aesmc_u8_tied1: diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 00605eb203f9..cab72c8a9e10 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -12914,7 +12914,7 @@ set exts { "sme-f8f16" "sme-f8f32" "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1" "sme2p2" "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma" "sve-bfscale" "sme-lutv2" - "ssve-fexpa" "ssve-bitperm" + "ssve-fexpa" "ssve-bitperm" "ssve-aes" } foreach { aarch64_ext } $exts {
