https://gcc.gnu.org/g:30fa32b2bff36d7b63fccdc997bd5f51b1427308
commit r17-2176-g30fa32b2bff36d7b63fccdc997bd5f51b1427308 Author: Jim Lin <[email protected]> Date: Mon Jul 6 10:44:29 2026 -0600 [PATCH] RISC-V: Fix ext-dce-4.c test_half_sign_needed shift amount test_half_sign_needed is a negative test expecting a sign-extending halfword load (lh). With *p >> 8 on a 16-bit short only the high byte is needed, so the compiler emits a sign-extending byte load (lb) and the lh match fails. Use *p >> 4 so the full halfword load is required. gcc/testsuite/ChangeLog: * gcc.target/riscv/ext-dce-4.c (test_half_sign_needed): Shift by 4 instead of 8 to keep the lh load. Diff: --- gcc/testsuite/gcc.target/riscv/ext-dce-4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/riscv/ext-dce-4.c b/gcc/testsuite/gcc.target/riscv/ext-dce-4.c index 21f2d9a13ebb..e9baf7e81cdb 100644 --- a/gcc/testsuite/gcc.target/riscv/ext-dce-4.c +++ b/gcc/testsuite/gcc.target/riscv/ext-dce-4.c @@ -40,7 +40,7 @@ test_byte (signed char *p) int test_half_sign_needed (signed short *p) { - return *p >> 8; + return *p >> 4; } /*
