The branch 'ibm/heads/gcc-17-future' was updated to point to:

 c3be3e9908e0... Merge commit 'refs/vendors/ibm/heads/gcc-17-future' of git+

It previously pointed to:

 4e16848e4c25... Merge commit 'refs/vendors/ibm/heads/gcc-17-future' of git+

Diff:

Summary of changes (added commits):
-----------------------------------

  c3be3e9... Merge commit 'refs/vendors/ibm/heads/gcc-17-future' of git+
  b79be52... PR target/120528 -- Simplify zero extend from memory to VSX
  b7a3f09... PR target/120528 -- Simplify zero extend from memory to VSX
  673e71e... Update ChangeLog.*
  b541b23... Update ChangeLog.*
  5e48cb2... Fix dense math register insert/extract 512-bit problem.
  6cd75d8... Fix -mregnames issue with dense math registers.
  db3380d... PR target/120528 -- Simplify zero extend from memory to VSX
  44e7576... Add dense math register support.
  04ded04... Update ChangeLog.*
  af37bc2... Add _Float16 and __bfloat16 support.
  7eabed9... PR target/117251: Add PowerPC XXEVAL support to speed up SH
  d42be73... PR target/120681 - allow -mcmodel=large with PC relative ad
  e5995cf... PR target/108958 -- simplify mtvsrdd to zero extend GPR DIm
  f224a4f... PR target/120528 -- Simplify zero extend from memory to VSX
  e40cf00... PR 992493: Optimize splat of a V2DF/V2DI extract with const
  2e1db60... Add power9 and power10 float to logical optimizations.
  d8de26a... Add miscellaneous -mcpu=future instructions
  31bf11e... Add dense math register support.
  762974e... Merge branch 'master' of git+ssh://gcc.gnu.org/git/gcc
  cc2a9b1... c++: handle nullptr_t in can_convert_eh (*)
  621661f... c++: fix unevaluated operand context for typeid [PR125886] (*)
  f1245f9... aarch64: Remove +mpamv2 and support for MPAMV2_VID. (*)
  b1eb6e0... fortran: [PR103367] Followup patch to fix related test case (*)
  2f7613d... aarch64: Add support for -mcpu=rigel (*)
  d15703b... [PATCH v5] RISC-V: Add small loop unrolling support via -mu (*)
  931cc97... aarch64: Add optimization for ADD (ABS (A), B) intrinsics (*)
  0bcb57a... libstdc++: Validate user-provided stride values for layout_ (*)
  50cbacf... libstdc++: Gracefully handle unrecognized _Arg_t values in  (*)
  0487ae7... libstdc++: Add _GLIBCXX_RESOLVE_LIB_DEFECTS comments for 20 (*)
  b14ad46... aarch64: Fix ICE in aarch64_function_arg_alignment with may (*)
  4790838... rs6000: Add vector uncompress and unpack builtins for -mcpu (*)
  c963db2... MAINTAINERS: Add a script to create a new entry in the main (*)
  89d27e5... MAINTAINERS: scripts to generate the file from yaml data (*)
  8b00dc7... editorconfig: Add rules for yaml/yml files. (*)
  d68464d... contrib/download_prerequisites: Use gettext-1.0.tar.gz (*)
  217a767... or1k: Stop allowing referring to SR_F in SImode and fix cmo (*)
  54dd657... tree-optimization: Extend CDCE memset shrink-wrapping to {0 (*)
  1bc69a0... Daily bump. (*)
  b484690... Ranger stmt prefill should process dependencies first. (*)
  604a45f... Split ranger timestamp into 2 values. (*)
  5d7c742... tree-optimization/124545 - fix pr124545-2.c on ilp32 target (*)
  216d08b... Fortran: degree trigonometric functions and procedure point (*)
  da2385e... cobol: Correct "included from" location. (*)
  49a5c52... libbacktrace: support returning discriminator field (*)
  30fa32b... [PATCH] RISC-V: Fix ext-dce-4.c test_half_sign_needed shift (*)
  413d90e... [PATCH] RISC-V: Skip shift-shift-7.c under -Og (*)
  deacdfc... MAINTAINERS: Add myself to write after approval (*)
  0114024... c++/reflection: check type traits preconditions [PR125901] (*)
  b6825a7... c++: naming typedef and incomplete class [PR126031] (*)
  1764969... [PATCH] RISC-V: Skip zbb-min-max-05.c under -funroll-loops (*)
  dcc27c7... [PATCH] RISC-V: Update spacemit-x60 to use rva22u64 profile (*)
  920256f... testsuite: arm: Properly quote command line arguments (*)
  7d0271c... Make SLP discovery more verbose (*)
  5f8d0cc... amdgcn: Add vec_set*ti instructions (*)
  fc8a4e9... Remove obsolete support for ADA_LONG_TYPE_SIZE (*)
  6cc7df8... Remove left-overs of WIDEST_HARDWARE_FP_SIZE (*)
  5c23bb0... Remove the path-splitting pass and deprecate -fsplit-paths  (*)
  e754b70... x86: Rewrite ix86_find_max_used_stack_alignment (*)
  172dc0e... libstdc++: Avoid '-Wtype-limits' warnings in 'libstdc++-v3/ (*)
  5be7b70... i386: Enable 512-bit byte dot-product only under AVX512BW [ (*)
  cdf63f7... Daily bump. (*)
  88752b8... aarch64: [PR126094] Update aarch64_cmtst* patterns for new  (*)
  3b443e7... match: Fix #ifdef GIMPLE typo [PR125641] (*)
  7da47d5... testsuite: Add C++ testcase for the recent PTA bug (*)
  6317bef... Objective-C,C++: Rework metadata generation [PR124260]. (*)
  5f2c4ca... Fortran: Fix ICE-on-invalid in trans_code. (*)
  0fe05c3... a68: avoid non-unique test names in the Algol 68 testsuite (*)
  5f12562... Hardcode Solaris v2 mapfile syntax with Solaris ld (*)
  726353f... a68: check for overflow in bits denotations (*)
  8d36f05... a68: support for decimal radix in bits denotations (*)
  f50679e... SH: Fix PR 67643 amendment of commit b6b9318ac9e72d6e (*)
  1d8f036... Add warnings about deleted PAUSE feature to test case. (*)
  b6b9318... SH: Fix PR 67643 (*)
  4508b52... SH: Remove remaining LRA transition helpers. (*)
  ed502f9... SH: Add test case for PR69765 (*)
  6e537f0... SH: Inline emit_fpu_switch into its only caller fpscr_set_f (*)
  899588f... SH: Avoid FPUL for fp-constant loads (*)
  1a59bc1... SH: Fix T bit set expressions of addc and subc insns. (*)
  b70bb7f... SH: Fix PR 124778 (*)
  24051c2... Daily bump. (*)
  e365e54... libgcc, Darwin: Fix missing prerequisite [PR123976]. (*)
  2fef81e... Fix two issues with unused/unset variable warnings. (*)
  9c36cea... i386.cc: Add a missing override specifier (*)
  e4b755b... RISC-V: Add testcase for unsigned scalar SAT_MUL form 19 (*)
  9285fc8... RISC-V: Add testcase for unsigned scalar SAT_MUL form 18 (*)
  f9c3634... RISC-V: Add testcase for unsigned scalar SAT_MUL form 17 (*)
  a5d79a6... RISC-V: Add testcase for unsigned scalar SAT_MUL form 16 (*)
  3932bb4... testsuite: Fix pr94589-5a.c (*)
  31d9672... Daily bump. (*)
  a20f452... tree-optimization/122569 - recognize CLZ via isolated MSB D (*)
  d5044b8... match.pd: factor MSB OR-cascade out of clz_table_index (*)
  ea8c74c... match: Simplify `(a CMP1 b) AND/IOR (a CMP2 b)` [PR126042] (*)
  0b533aa... c++: Fix structured binding mangling during error recovery  (*)
  c1a7d0a... c++: Implement C++29 P2953R5 - Adding restrictions to defau (*)
  a55bba0... c++: Fix up ICEs with some metafns with non-dependent args  (*)
  f84dfd8... AVR: Adding +/-1 to a lower reg doesn't need a scratch. (*)
  0b9e5f9... libstdc++: fix allocate_at_least test for small alignments  (*)
  150eb4c... OpenMP, Fortran: Fix indentation in resolve_omp_clauses_aff (*)
  7c3add6... libssp: Include 'stdlib.h' for using alloca(3) [PR116547] (*)
  ea40208... libstdc++: Reserve _Pres_type value for prefixed hexadecima (*)
  8363c23... [RISC-V] Utilize shNadd.uw during ADD synthesis (*)
  af13bb0... [RISC-V] Improve AND synthesis (*)
  4fd42fc... libstdc++: Provide defined behavior for unrecognized _Pres_ (*)
  87cf7de... libstdc++: Return optional<const _Ex&> from exception_ptr_c (*)
  197dec1... libstdc++: Extract optional<T&> specialization to bits/opti (*)
  dc76a7f... objective-c,c++: Make declarations language-aware [PR124260 (*)
  9f3003f... Make BB SLP costing more verbose (*)
  a8072f3... tree-optimization: fold memset with length in [0, 1] to con (*)
  395e3d8... aarch64: Fold merging svextb/svexth/svextw with a ptrue to  (*)
  6658c23... fortran: Don't reuse original descriptors for packed arrays (*)
  7e3889b... middle-end: Handle variable-length vector types in store_co (*)
  2b8f467... SH: Add test case for PR81426 (*)
  ca97c74... SH: Add another testcase for PR 34777 (*)
  af50224... SH: Add another test case for LRA (*)
  e07e140... [RISC-V] Improve IOR/XOR synthesis for expensive constant c (*)
  7817a32... regenerate sh.opt.urls, vas.opt.urls (*)
  75a75f2... SH: Switch to LRA permanently (*)
  8f8968a... SH: Add movv2sf patterns. (*)
  6a1f0d1... SH: Reduce R0 live ranges around R0-constrained move insns  (*)
  2b2e5f6... SH: Adjust fp-reg related move insns to work with LRA (*)

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