https://gcc.gnu.org/g:8467d9ca083d9e43e8b234c845f44d4210ba7321

commit 8467d9ca083d9e43e8b234c845f44d4210ba7321
Author: Jeevitha Palanisamy <[email protected]>
Date:   Thu Jul 9 14:19:51 2026 -0500

    rs6000: Add %W print modifier for VSX register +2
    
    Add a new %W print modifier that prints the VSX register number
    corresponding to the operand plus two. Use %W in the Dense Math
    extract pattern instead of %Y, keeping the existing %Y semantics
    unchanged.
    
    2026-07-10  Jeevitha Palanisamy  <[email protected]>
    
    gcc/
            * config/rs6000/rs6000.cc (print_operand): Add %W print
            modifier for VSX register +2.
            * config/rs6000/mma.md (dm_extract512): Use %W to print
            the second VSX register operand.

Diff:
---
 gcc/config/rs6000/mma.md    |  2 +-
 gcc/config/rs6000/rs6000.cc | 22 ++++++++++++++++++++++
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index a819a7aa65c4..382bd1f1f294 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -586,7 +586,7 @@
                    (match_operand 2 "const_0_to_1_operand" "n")]
                   UNSPEC_DMF_EXTRACT512))]
   "TARGET_DMF"
-  "dmxxextfdmr512 %x0,%Y0,%1,%2"
+  "dmxxextfdmr512 %x0,%W0,%1,%2"
   [(set_attr "type" "dmf")])
 
 ;; TDO (1024-bit dense-math) move expander.
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index c212a6aa114a..d816ffe02b4b 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -14652,6 +14652,28 @@ print_operand (FILE *file, rtx x, int code)
                         ? reg - 32
                         : reg - FIRST_ALTIVEC_REGNO + 32);
 
+#ifdef TARGET_REGNAMES
+         if (TARGET_REGNAMES)
+           fprintf (file, "%%vs%d", vsx_reg);
+         else
+#endif
+           fprintf (file, "%d", vsx_reg);
+       }
+      return;
+
+    case 'W':
+      /* Like '%x', but prints the VSX register number +2.
+      Used by dmxxextfdmr512 to print the second VSR pair.  */
+      if (!REG_P (x) || !VSX_REGNO_P (REGNO (x)))
+       output_operand_lossage ("invalid %%W value");
+      else
+       {
+         int reg = REGNO (x);
+         int vsx_reg = (FP_REGNO_P (reg)
+                        ? reg - 32
+                        : reg - FIRST_ALTIVEC_REGNO + 32);
+         vsx_reg += 2;
+
 #ifdef TARGET_REGNAMES
          if (TARGET_REGNAMES)
            fprintf (file, "%%vs%d", vsx_reg);

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