https://gcc.gnu.org/g:2f05e4ee176c6e8a89199ed7daddb04466bd7081
commit 2f05e4ee176c6e8a89199ed7daddb04466bd7081 Author: Michael Meissner <[email protected]> Date: Thu Sep 10 01:37:22 2026 -0400 Add -mbfloat16-p10-convert. 2026-09-10 Michael Meissner <[email protected]> gcc/ * config/rs6000/float16.md (extendbf<mode>2): Add -mbfloat16-p10-convert. (extendbfsf2_sw): Likewise. (extendbfsf2_sw_mem): Likewise. (extendbfdf2_sw): Likewise. (trunc<mode>bf2): Likewise. * config/rs6000/rs6000.opt (-mbfloat16-p10-convert): New option. Diff: --- gcc/config/rs6000/float16.md | 16 +++++++++------- gcc/config/rs6000/rs6000.opt | 4 ++++ 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/gcc/config/rs6000/float16.md b/gcc/config/rs6000/float16.md index 756106064e27..dbaff17ce704 100644 --- a/gcc/config/rs6000/float16.md +++ b/gcc/config/rs6000/float16.md @@ -243,7 +243,7 @@ rtx op0 = operands[0]; rtx op1 = operands[1]; - if (TARGET_BFLOAT16_HW) + if (TARGET_BFLOAT16_HW && TARGET_BFLOAT16_P10_CONVERT) emit_insn (gen_extendbf<mode>2_hw (op0, op1)); else if (<MODE>mode == SFmode) @@ -265,8 +265,8 @@ (match_operand:BF 1 "int_reg_operand" "r,r"))) (match_scratch:DI 2 "=r,X") ] - "TARGET_FLOAT16 && !TARGET_BFLOAT16_HW && TARGET_DIRECT_MOVE_64BIT - && TARGET_BFLOAT16_CONVERT" + "TARGET_FLOAT16 && TARGET_DIRECT_MOVE_64BIT && TARGET_BFLOAT16_CONVERT + && (!TARGET_BFLOAT16_HW || !TARGET_BFLOAT16_P10_CONVERT)" "#" "&& reload_completed" [(pc)] @@ -308,7 +308,8 @@ (float_extend:SF (match_operand:BF 1 "int_reg_operand" "r"))) (match_scratch:DI 2 "=r")] - "TARGET_FLOAT16 && !TARGET_BFLOAT16_HW && TARGET_BFLOAT16_CONVERT" + "TARGET_FLOAT16 && TARGET_BFLOAT16_CONVERT + && (!TARGET_BFLOAT16_HW || !TARGET_BFLOAT16_P10_CONVERT)" "#" "&& reload_completed" [(pc)] @@ -336,8 +337,8 @@ (float_extend:DF (match_operand:BF 1 "int_reg_operand" "r"))) (match_scratch:DI 2 "=r")] - "TARGET_FLOAT16 && !TARGET_BFLOAT16_HW && TARGET_DIRECT_MOVE_64BIT - && TARGET_BFLOAT16_CONVERT" + "TARGET_FLOAT16 && TARGET_DIRECT_MOVE_64BIT && TARGET_BFLOAT16_CONVERT + && (!TARGET_BFLOAT16_HW || !TARGET_BFLOAT16_P10_CONVERT)" "#" "&& reload_completed" [(pc)] @@ -460,7 +461,8 @@ (float_truncate:BF (match_operand:SFDF 1 "vsx_register_operand" "wa"))) (clobber (match_scratch:V4SF 2 "=wa"))] - "TARGET_BFLOAT16_HW && TARGET_BFLOAT16_CONVERT" + "TARGET_BFLOAT16_HW && TARGET_BFLOAT16_CONVERT + && !TARGET_BFLOAT16_P10_CONVERT" "#" "&& 1" [(pc)] diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index a35116c8f606..1e68a3165d7e 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -654,6 +654,10 @@ mbfloat16-convert Target Undocumented Var(TARGET_BFLOAT16_CONVERT) Init(1) Save Do __bf16 conversions with inline code. +mbfloat16-p10-convert +Target Undocumented Var(TARGET_BFLOAT16_P10_CONVERT) Init(1) Save +Use power10 instructions to convert __bf16 to float/double. + ; Documented parameters -param=rs6000-vect-unroll-limit=
