https://gcc.gnu.org/g:04939bb2ded2dd3f2b88372db9961b3bb2f16e7e

commit r17-4177-g04939bb2ded2dd3f2b88372db9961b3bb2f16e7e
Author: Robin Dapp <[email protected]>
Date:   Fri Sep 11 09:38:43 2026 +0200

    RISC-V: Fix riscv_slow_unaligned_access.
    
    This is "fun" but since we added a vector mode check to
    riscv_slow_unaligned_access we returned mostly the inverted value for
    supported misaligned access.  For -mtune=generic-ooo we currently
    get _slow_ misaligned accesses from this hook.
    
    The patch aligns riscv_slow_unaligned_access with
    riscv_support_vector_misalignment.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.cc (riscv_slow_unaligned_access):
            Return the same as riscv_support_vector_misalignment.

Diff:
---
 gcc/config/riscv/riscv.cc | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 11d3c5a32dcd..58c48bd1627c 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -13145,10 +13145,13 @@ riscv_cannot_copy_insn_p (rtx_insn *insn)
 /* Implement TARGET_SLOW_UNALIGNED_ACCESS.  */
 
 static bool
-riscv_slow_unaligned_access (machine_mode mode, unsigned int)
+riscv_slow_unaligned_access (machine_mode mode, unsigned int align)
 {
-  return VECTOR_MODE_P (mode) ? TARGET_VECTOR_MISALIGN_SUPPORTED
-                             : riscv_slow_unaligned_access_p;
+  /* This must agree with riscv_support_vector_misalignment.  */
+  if (VECTOR_MODE_P (mode))
+    return align % GET_MODE_UNIT_SIZE (mode);
+  else
+    return riscv_slow_unaligned_access_p;
 }
 
 static bool

Reply via email to