https://gcc.gnu.org/g:3b82f10679b8d849c24e11da051e9cc49831e79d
commit 3b82f10679b8d849c24e11da051e9cc49831e79d Author: Michael Meissner <[email protected]> Date: Wed Sep 16 18:04:54 2026 -0400 Re-enable power8 support; Add conversions to/from integers; Fix typo. 2026-09-16 Michael Meissner <[email protected]> gcc/ * config/rs6000/float16.md (extendbfhf2): Correct insn spelling. (fix_trunc<FP16:mode><GPR:mode>2): Add support for converting integers to/from 16-bit floating point. (fixuns_trunc<FP16:mode><GPR:mode>2): Likewise. (float<GPR:mode><FP16:mode>2): Likewise. (floatuns<GPR:mode><FP16:mode>2): Likewise. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Reallow power8 to run 16-bit floating point. gcc/testsuite/ * gcc.target/powerpc/bf16-2.c: Add power8 test again. Only run test on power10. Force power10 code to use power10 instructions. (gcc.target/powerpc/float16-2.c): Likewise. Diff: --- gcc/config/rs6000/float16.md | 55 +++++++++++++++++++++++++++- gcc/config/rs6000/rs6000.cc | 4 +- gcc/testsuite/gcc.target/powerpc/bf16-2.c | 36 +++++++++++++++--- gcc/testsuite/gcc.target/powerpc/float16-2.c | 36 +++++++++++++++--- 4 files changed, 118 insertions(+), 13 deletions(-) diff --git a/gcc/config/rs6000/float16.md b/gcc/config/rs6000/float16.md index e16853292735..da1488a807b0 100644 --- a/gcc/config/rs6000/float16.md +++ b/gcc/config/rs6000/float16.md @@ -598,7 +598,7 @@ ;; XVCVBF16SP tmp1,tmp1 ;; XVCVSPBF16N r0,tmp1 -(define_insn_and_split "expandbfhf2" +(define_insn_and_split "extendbfhf2" [(set (match_operand:HF 0 "vsx_register_operand" "=wa") (float_extend:HF (match_operand:BF 1 "vsx_register_operand" "wa"))) @@ -678,6 +678,59 @@ convert_move (operands[0], df_tmp, 0); DONE; }) + +;; Convert 16-bit floating point to integers +(define_expand "fix_trunc<FP16:mode><GPR:mode>2" + [(use (match_operand:GPR 0 "vsx_register_operand")) + (use (match_operand:FP16 1 "vsx_register_operand"))] + "can_create_pseudo_p ()" +{ + rtx df_tmp = gen_reg_rtx (DFmode); + + convert_move (df_tmp, operands[1], 0); + emit_insn (gen_fix_truncdf<GPR:mode>2 (operands[0], df_tmp)); + + DONE; +}) + +(define_expand "fixuns_trunc<FP16:mode><GPR:mode>2" + [(use (match_operand:GPR 0 "vsx_register_operand")) + (use (match_operand:FP16 1 "vsx_register_operand"))] + "can_create_pseudo_p ()" +{ + rtx df_tmp = gen_reg_rtx (DFmode); + + convert_move (df_tmp, operands[1], 0); + emit_insn (gen_fixuns_truncdf<GPR:mode>2 (operands[0], df_tmp)); + + DONE; +}) + +;; Convert integers to 16-bit floating point +(define_expand "float<GPR:mode><FP16:mode>2" + [(use (match_operand:FP16 0 "vsx_register_operand")) + (use (match_operand:GPR 1 "vsx_register_operand"))] + "can_create_pseudo_p ()" +{ + rtx df_tmp = gen_reg_rtx (DFmode); + + emit_insn (gen_float<GPR:mode>df2 (df_tmp, operands[1])); + convert_move (operands[0], df_tmp, 0); + DONE; +}) + +(define_expand "floatuns<GPR:mode><FP16:mode>2" + [(use (match_operand:FP16 0 "vsx_register_operand")) + (use (match_operand:GPR 1 "vsx_register_operand"))] + "can_create_pseudo_p ()" +{ + rtx df_tmp = gen_reg_rtx (DFmode); + + emit_insn (gen_floatuns<GPR:mode>df2 (df_tmp, operands[1])); + convert_move (operands[0], df_tmp, 0); + DONE; +}) + ;; Negate 16-bit floating point by XOR with -0.0. diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index efdb2b42d3ae..371d6de2a8ae 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -4000,11 +4000,11 @@ rs6000_option_override_internal (bool global_init_p) systems at the current time. */ if (TARGET_FLOAT16) { - if (!TARGET_P9_VECTOR) + if (!TARGET_P8_VECTOR) { rs6000_isa_flags &= ~OPTION_MASK_FLOAT16; if (rs6000_isa_flags_explicit & OPTION_MASK_FLOAT16) - error ("%qs needs at least %qs", "-mfloat16", "-mcpu=power9"); + error ("%qs needs at least %qs", "-mfloat16", "-mcpu=power8"); } else if (BYTES_BIG_ENDIAN || !TARGET_POWERPC64) { diff --git a/gcc/testsuite/gcc.target/powerpc/bf16-2.c b/gcc/testsuite/gcc.target/powerpc/bf16-2.c index 1c425c890bea..05f56eda5bb4 100644 --- a/gcc/testsuite/gcc.target/powerpc/bf16-2.c +++ b/gcc/testsuite/gcc.target/powerpc/bf16-2.c @@ -1,6 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target ppc_bf16_hw } */ -/* { dg-options "-mfloat16 -O2" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-require-effective-target ppc_float16_hw } */ +/* { dg-options "-mfloat16 -O2 -mdejagnu-cpu=power10" } */ #include <stdlib.h> @@ -11,13 +11,25 @@ Power10 supports the XVCVBF16SPN and XVCVSPBF16 instructions that convert between a vector __bf16 and a vector float. */ +extern void do_power8 (void) __attribute__ ((noinline,target("cpu=power8"))); extern void do_power9 (void) __attribute__ ((noinline,target("cpu=power9"))); +extern void do_power10 (void) __attribute__ ((noinline,target("cpu=power10"))); -volatile __bf16 two = 2.0; +volatile __bf16 two = 2.0; volatile __bf16 three = 3.0; -volatile __bf16 p9_add, p9_sub, p9_mul, p9_div; +volatile __bf16 p8_add, p8_sub, p8_mul, p8_div; +volatile __bf16 p9_add, p9_sub, p9_mul, p9_div; volatile __bf16 p10_add, p10_sub, p10_mul, p10_div; +void +do_power8 (void) +{ + p8_add = three + two; + p8_sub = three - two; + p8_mul = three * two; + p8_div = three / two; +} + void do_power9 (void) { @@ -39,6 +51,20 @@ do_power10 (void) int main (int argc, char *argv[]) { + do_power8 (); + + if (((double)p8_add) != 5.0) + abort (); + + if (((double)p8_sub) != 1.0) + abort (); + + if (((double)p8_mul) != 6.0) + abort (); + + if (((double)p8_div) != 1.5) + abort (); + do_power9 (); if (((double)p9_add) != 5.0) diff --git a/gcc/testsuite/gcc.target/powerpc/float16-2.c b/gcc/testsuite/gcc.target/powerpc/float16-2.c index b2a334158c44..608b5d28682c 100644 --- a/gcc/testsuite/gcc.target/powerpc/float16-2.c +++ b/gcc/testsuite/gcc.target/powerpc/float16-2.c @@ -1,6 +1,6 @@ -/* { dg-do run } */ +/* { dg-do run { target { power10_hw } } } */ /* { dg-require-effective-target ppc_float16_hw } */ -/* { dg-options "-mfloat16 -O2" } */ +/* { dg-options "-mfloat16 -O2 -mdejagnu-cpu=power10" } */ #include <stdlib.h> @@ -12,13 +12,25 @@ Power9 supports the XSCVHPDP and XSCVDPHP instructions that convert between a scalar _Float16 and a scalar double. */ -extern void do_power9 (void) __attribute__ ((noinline,target("cpu=power9"))); +extern void do_power8 (void) __attribute__ ((noinline,target("cpu=power8"))); +extern void do_power9 (void) __attribute__ ((noinline,target("cpu=power9"))); +extern void do_power10 (void) __attribute__ ((noinline,target("cpu=power10"))); -volatile _Float16 two = 2.0; +volatile _Float16 two = 2.0; volatile _Float16 three = 3.0; -volatile _Float16 p9_add, p9_sub, p9_mul, p9_div; +volatile _Float16 p8_add, p8_sub, p8_mul, p8_div; +volatile _Float16 p9_add, p9_sub, p9_mul, p9_div; volatile _Float16 p10_add, p10_sub, p10_mul, p10_div; +void +do_power8 (void) +{ + p8_add = three + two; + p8_sub = three - two; + p8_mul = three * two; + p8_div = three / two; +} + void do_power9 (void) { @@ -40,6 +52,20 @@ do_power10 (void) int main (int argc, char *argv[]) { + do_power8 (); + + if (((double)p8_add) != 5.0) + abort (); + + if (((double)p8_sub) != 1.0) + abort (); + + if (((double)p8_mul) != 6.0) + abort (); + + if (((double)p8_div) != 1.5) + abort (); + do_power9 (); if (((double)p9_add) != 5.0)
