https://gcc.gnu.org/g:bbf9808d787eacf4464f2298d2f4265855b006bf

commit r17-4622-gbbf9808d787eacf4464f2298d2f4265855b006bf
Author: Richard Biener <[email protected]>
Date:   Wed Sep 23 11:04:39 2026 +0200

    account for SSE to integer move cost for vec_to_scalar
    
    vec_to_scalar costs a lane extraction which might be lane zero
    from a vector to a scalar.  The following makes us account for
    the extra cost when the target is a GPR.
    
    I chose to not limit the testcase to any tuning/ISA, it shouldn't
    be vectorized for any combination.
    
            PR target/127268
            * config/i386/i386.cc (ix86_default_vector_cost): For
            integer mode vec_to_scalar add sse_to_integer cost.
    
            * gcc.target/i386/vect-bb-reduc-1.c: New testcase.

Diff:
---
 gcc/config/i386/i386.cc                         |  5 +++++
 gcc/testsuite/gcc.target/i386/vect-bb-reduc-1.c | 13 +++++++++++++
 2 files changed, 18 insertions(+)

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 705ebb6c014c..b09a5077820a 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -26045,7 +26045,12 @@ ix86_default_vector_cost (enum vect_cost_for_stmt 
type_of_cost,
         return COSTS_N_INSNS (ix86_cost->sse_store[index]) / 2;
 
       case vec_to_scalar:
+       /* This is a lane extraction, possibly from lane zero.  */
+       return (ix86_vec_cost (mode, ix86_cost->sse_op)
+               + (fp ? 0 : COSTS_N_INSNS (ix86_cost->sse_to_integer) / 2));
+
       case scalar_to_vec:
+       /* This is always a full splat from scalar, not a lane insertion.  */
         return ix86_vec_cost (mode, ix86_cost->sse_op);
 
       /* We should have separate costs for unaligned loads and gather/scatter.
diff --git a/gcc/testsuite/gcc.target/i386/vect-bb-reduc-1.c 
b/gcc/testsuite/gcc.target/i386/vect-bb-reduc-1.c
new file mode 100644
index 000000000000..c8efbb8c24f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/vect-bb-reduc-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+extern unsigned char *var1;
+extern unsigned short var2;
+void
+func (void)
+{
+  var2 = var1[1] + var1[0];
+}
+
+/* We do not want to vectorize the reduction.  */
+/* { dg-final { scan-assembler-not "xmm" } } */

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