https://gcc.gnu.org/g:12e98dcdab7ef2e631d273da2f63049cf9fe905a
commit 12e98dcdab7ef2e631d273da2f63049cf9fe905a Author: Michael Meissner <[email protected]> Date: Fri Sep 25 15:01:04 2026 -0400 Add _gpr BFmode conversion functions. 2026-09-25 Michael Meissner <[email protected]> * config/rs60000/pc-fixbfdi.c: New file. * config/rs6000/ppc-fixbfsi.c: Likewise. * config/rs6000/ppc-fixbfti.c: Likewise. * config/rs60000/pc-fixunsbfdi.c: Likewise. * config/rs6000/ppc-fixunsbfsi.c: Likewise. * config/rs6000/ppc-fixunsbfti.c: Likewise. * config/rs6000/ppc-floatdibf.c: Likewise. * config/rs6000/ppc-floatsibf.c: Likewise. * config/rs6000/ppc-floattibf.c: Likewise. * config/rs6000/ppc-floatundibf.c: Likewise. * config/rs6000/ppc-floatunsibf.c: Likewise. * config/rs6000/ppc-floatuntibf.c: Likewise. * config/rs6000/sfp-machine.h: Declare all of the _gpr functions. Add unions to convert between unsigned short and BFtype/HFtype. * config/rs6000/extendbf-sfdf2.c: Rewrite. * config/rs6000/extendhf-sfdf2.c: Likewise. * config/rs6000/t-float16: Add support for the BF _gpr functions. * config/rs6000/truncsfdf-bf2.c: Rewrite. * config/rs6000/truncsfdf-hf2.c: Likewise. Diff: --- libgcc/config/rs6000/extendbf-sfdf2.c | 117 +++------------------------------ libgcc/config/rs6000/extendhf-sfdf2.c | 86 +++--------------------- libgcc/config/rs6000/ppc-fixbfdi.c | 71 ++++++++++++++++++++ libgcc/config/rs6000/ppc-fixbfsi.c | 71 ++++++++++++++++++++ libgcc/config/rs6000/ppc-fixbfti.c | 71 ++++++++++++++++++++ libgcc/config/rs6000/ppc-fixunsbfdi.c | 71 ++++++++++++++++++++ libgcc/config/rs6000/ppc-fixunsbfsi.c | 71 ++++++++++++++++++++ libgcc/config/rs6000/ppc-fixunsbfti.c | 71 ++++++++++++++++++++ libgcc/config/rs6000/ppc-floatdibf.c | 69 +++++++++++++++++++ libgcc/config/rs6000/ppc-floatsibf.c | 69 +++++++++++++++++++ libgcc/config/rs6000/ppc-floattibf.c | 69 +++++++++++++++++++ libgcc/config/rs6000/ppc-floatundibf.c | 68 +++++++++++++++++++ libgcc/config/rs6000/ppc-floatunsibf.c | 68 +++++++++++++++++++ libgcc/config/rs6000/ppc-floatuntibf.c | 68 +++++++++++++++++++ libgcc/config/rs6000/sfp-machine.h | 103 ++++++++++++++++++++++------- libgcc/config/rs6000/t-float16 | 14 ++-- libgcc/config/rs6000/truncsfdf-bf2.c | 82 ++--------------------- libgcc/config/rs6000/truncsfdf-hf2.c | 85 ++---------------------- 18 files changed, 955 insertions(+), 369 deletions(-) diff --git a/libgcc/config/rs6000/extendbf-sfdf2.c b/libgcc/config/rs6000/extendbf-sfdf2.c index ec0d8f176a96..b46805e998cf 100644 --- a/libgcc/config/rs6000/extendbf-sfdf2.c +++ b/libgcc/config/rs6000/extendbf-sfdf2.c @@ -28,10 +28,6 @@ This is a clone of soft-fp/extendbfsf2.c for the PowerPC. - We provide power8, power9, and power10 versiosns of the conversion function - and we use an ifunc resolver to select the appropriate conversion to - use. - We provide an alternative version of the conversion that takes the value in a GPR passed as an unsigned short. This is to allow the calling sequence where arguments are converted to the 32/64-bit scalar format. If we don't @@ -43,48 +39,9 @@ #include "single.h" #include "double.h" -union ushort_bf { - unsigned short us; - BFtype bf; -}; - -typedef SFtype bf_fpr_to_sf_function_t (BFtype a); -typedef SFtype bf_gpr_to_sf_function_t (unsigned short a); - -typedef bf_fpr_to_sf_function_t *bf_fpr_to_sf_ptr_function_t; -typedef bf_gpr_to_sf_function_t *bf_gpr_to_sf_ptr_function_t; - -static bf_fpr_to_sf_ptr_function_t __extendbfsf2_ifunc (void); -static bf_gpr_to_sf_ptr_function_t __extendbfsf2_gpr_ifunc (void); - -static bf_fpr_to_sf_function_t __extendbfsf2_p8 - __attribute__ ((__target__("cpu=power8"))); - -static bf_gpr_to_sf_function_t __extendbfsf2_gpr_p8 - __attribute__ ((__target__("cpu=power8"))); - -static bf_fpr_to_sf_function_t __extendbfsf2_p9 - __attribute__ ((__target__("cpu=power9"))); - -static bf_gpr_to_sf_function_t __extendbfsf2_gpr_p9 - __attribute__ ((__target__("cpu=power9"))); - -static bf_fpr_to_sf_function_t __extendbfsf2_p10 - __attribute__ ((__target__("cpu=power10"))); - -static bf_gpr_to_sf_function_t __extendbfsf2_gpr_p10 - __attribute__ ((__target__("cpu=power10"))); - -extern bf_fpr_to_sf_function_t __extendbfsf2 - __attribute__ ((__ifunc__ ("__extendbfsf2_ifunc"))); - -extern bf_gpr_to_sf_function_t __extendbfsf2_gpr - __attribute__ ((__ifunc__ ("__extendbfsf2_gpr_ifunc"))); - -/* Power8 implementation, BFtype passed in FPR register, no hardware - support. */ -static SFtype -__extendbfsf2_p8 (BFtype a) +/* BFtype passed in FPR register. */ +SFtype +__extendbfsf2 (BFtype a) { FP_DECL_EX; FP_DECL_B (A); @@ -100,10 +57,9 @@ __extendbfsf2_p8 (BFtype a) return r; } -/* Power8 implementation, BFtype passed in GPR register, no hardware - support. */ -static SFtype -__extendbfsf2_gpr_p8 (unsigned short us) +/* BFtype passed in GPR register. */ +SFtype +__extendbfsf2_gpr (unsigned short us) { union ushort_bf u; BFtype a; @@ -125,65 +81,8 @@ __extendbfsf2_gpr_p8 (unsigned short us) return r; } -/* Power9 implementation, BFtype passed in FPR register, use shift and - XSCVSPDPN. */ -static SFtype -__extendbfsf2_p9 (BFtype a) -{ - return (SFtype) a; -} - -/* Power9 implementation, BFtype passed in GPR register, use shift and - XSCVSPDPN. */ -static SFtype -__extendbfsf2_gpr_p9 (unsigned short a) -{ - union ushort_bf u; - u.us = a; - return (SFtype) u.bf; -} - -/* Power10 implementtion, BFtype passed in FPR register, use XXSPLTW, - XVCVBF16SPN, and XSCVSPDPN. */ -static SFtype -__extendbfsf2_p10 (BFtype a) -{ - return (SFtype) a; -} - -/* Power10 implementtion, BFtype passed in GPR register, use XXSPLTW, - XVCVBF16SPN, and XSCVSPDPN. */ -static SFtype -__extendbfsf2_gpr_p10 (unsigned short a) -{ - union ushort_bf u; - u.us = a; - return (SFtype) u.bf; -} - -/* Determine if we are on power8, power9, or power10. */ -static bf_fpr_to_sf_ptr_function_t -__extendbfsf2_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_1") - ? __extendbfsf2_p10 - : (__builtin_cpu_supports ("arch_3_00") - ? __extendbfsf2_p9 - : __extendbfsf2_p8)); -} - -static bf_gpr_to_sf_ptr_function_t -__extendbfsf2_gpr_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_1") - ? __extendbfsf2_gpr_p10 - : (__builtin_cpu_supports ("arch_3_00") - ? __extendbfsf2_gpr_p9 - : __extendbfsf2_gpr_p8)); -} - -/* On the PowerPC DFtype scalars use the same encoding as SFtype, so use the - same function for both. */ +/* On the PowerPC DFtype scalars use the same encoding as SFtype, so we can use + the same function for both. */ __asm__ ("\t.globl __extendbfdf2\n" "__extendbfdf2 = __extendbfsf2\n" "\n" diff --git a/libgcc/config/rs6000/extendhf-sfdf2.c b/libgcc/config/rs6000/extendhf-sfdf2.c index b99b1f1d4f97..58fe008dbcae 100644 --- a/libgcc/config/rs6000/extendhf-sfdf2.c +++ b/libgcc/config/rs6000/extendhf-sfdf2.c @@ -24,12 +24,9 @@ You should have received a copy of the GNU Lesser General Public License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ + <http://www.gnu.org/licenses/>. -/* This is a clone of soft-fp/extendhfsf2.c for the PowerPC. - - We provide power8, and power9 versiosns of the conversion function and we - use an ifunc resolver to select the appropriate conversion to use. + This is a clone of soft-fp/extendhfsf2.c for the PowerPC. We provide an alternative version of the conversion that takes the value in a GPR passed as an unsigned short. This is to allow the calling sequence @@ -42,42 +39,9 @@ #include "single.h" #include "double.h" -union ushort_hf { - unsigned short us; - HFtype hf; -}; - -typedef SFtype hf_fpr_to_sf_function_t (HFtype a); -typedef SFtype hf_gpr_to_sf_function_t (unsigned short a); - -typedef hf_fpr_to_sf_function_t *hf_fpr_to_sf_ptr_function_t; -typedef hf_gpr_to_sf_function_t *hf_gpr_to_sf_ptr_function_t; - -static hf_fpr_to_sf_ptr_function_t __extendhfsf2_ifunc (void); -static hf_gpr_to_sf_ptr_function_t __extendhfsf2_gpr_ifunc (void); - -static hf_fpr_to_sf_function_t __extendhfsf2_p8 - __attribute__ ((__target__("cpu=power8"))); - -static hf_gpr_to_sf_function_t __extendhfsf2_gpr_p8 - __attribute__ ((__target__("cpu=power8"))); - -static hf_fpr_to_sf_function_t __extendhfsf2_p9 - __attribute__ ((__target__("cpu=power9"))); - -static hf_gpr_to_sf_function_t __extendhfsf2_gpr_p9 - __attribute__ ((__target__("cpu=power9"))); - -extern hf_fpr_to_sf_function_t __extendhfsf2 - __attribute__ ((__ifunc__ ("__extendhfsf2_ifunc"))); - -extern hf_gpr_to_sf_function_t __extendhfsf2_gpr - __attribute__ ((__ifunc__ ("__extendhfsf2_gpr_ifunc"))); - -/* Power8 implementation, HFtype passed in FPR register, no hardware - support. */ -static SFtype -__extendhfsf2_p8 (HFtype a) +/* HFtype passed in FPR register. */ +SFtype +__extendhfsf2 (HFtype a) { FP_DECL_EX; FP_DECL_H (A); @@ -93,10 +57,9 @@ __extendhfsf2_p8 (HFtype a) return r; } -/* Power8 implementation, HFtype passed in GPR register, no hardware - support. */ -static SFtype -__extendhfsf2_gpr_p8 (unsigned short us) +/* HFtype passed in GPR register. */ +SFtype +__extendhfsf2_gpr (unsigned short us) { union ushort_hf u; HFtype a; @@ -118,39 +81,6 @@ __extendhfsf2_gpr_p8 (unsigned short us) return r; } -/* Power9 implementation, HFtype passed in FPR register, use XVCVHPSP. */ -static SFtype -__extendhfsf2_p9 (HFtype a) -{ - return (SFtype) a; -} - -/* Power9 implementation, HFtype passed in GPR register, use XVCVHPSP. */ -static SFtype -__extendhfsf2_gpr_p9 (unsigned short a) -{ - union ushort_hf u; - u.us = a; - return (SFtype) u.hf; -} - -/* Determine if we are on power8 or power9. */ -static hf_fpr_to_sf_ptr_function_t -__extendhfsf2_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_00") - ? __extendhfsf2_p9 - : __extendhfsf2_p8); -} - -static hf_gpr_to_sf_ptr_function_t -__extendhfsf2_gpr_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_00") - ? __extendhfsf2_gpr_p9 - : __extendhfsf2_gpr_p8); -} - /* On the PowerPC DFtype scalars use the same encoding as SFtype, so use the same function for both. */ __asm__ ("\t.globl __extendhfdf2\n" diff --git a/libgcc/config/rs6000/ppc-fixbfdi.c b/libgcc/config/rs6000/ppc-fixbfdi.c new file mode 100644 index 000000000000..0535ec4ab45b --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfdi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert a IEEE half to 64bit signed integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfdi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +DItype +__fixbfdi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +DItype +__fixbfdi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixbfsi.c b/libgcc/config/rs6000/ppc-fixbfsi.c new file mode 100644 index 000000000000..e72882baaace --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfsi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 32bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfsi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +SItype +__fixbfsi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +SItype +__fixbfsi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixbfti.c b/libgcc/config/rs6000/ppc-fixbfti.c new file mode 100644 index 000000000000..8319310188bc --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfti.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 128bit signed integer + Copyright (C) 2007-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfti.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +TItype +__fixbfti (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +TItype +__fixbfti_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunsbfdi.c b/libgcc/config/rs6000/ppc-fixunsbfdi.c new file mode 100644 index 000000000000..eb0422d0ded0 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunsbfdi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 64bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfdi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +UDItype +__fixunsbfdi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +UDItype +__fixunsbfdi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunsbfsi.c b/libgcc/config/rs6000/ppc-fixunsbfsi.c new file mode 100644 index 000000000000..db957f096994 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunsbfsi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 32bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixunsbfsi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +USItype +__fixunsbfsi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +USItype +__fixunsbfsi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunsbfti.c b/libgcc/config/rs6000/ppc-fixunsbfti.c new file mode 100644 index 000000000000..ac46b8a44631 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunsbfti.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 128bit unsigned integer + Copyright (C) 2007-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhunshfti.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +UTItype +__fixunsbfti (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +UTItype +__fixunsbfti_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-floatdibf.c b/libgcc/config/rs6000/ppc-floatdibf.c new file mode 100644 index 000000000000..26a8aba9c86a --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatdibf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 32bit signed integer to bfloat16 + Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatdibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatdibf (DItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatdibf_gpr (DItype i) +{ + union ushort_bf u; + + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatsibf.c b/libgcc/config/rs6000/ppc-floatsibf.c new file mode 100644 index 000000000000..f0e79baf9a6a --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatsibf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 32bit signed integer to bfloat16 + Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatsibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatsibf (SItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatsibf_gpr (SItype i) +{ + union ushort_bf u; + + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floattibf.c b/libgcc/config/rs6000/ppc-floattibf.c new file mode 100644 index 000000000000..74dad155436f --- /dev/null +++ b/libgcc/config/rs6000/ppc-floattibf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 128bit signed integer to bfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floattibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floattibf (TItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floattibf_gpr (TItype i) +{ + union ushort_bf u; + + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatundibf.c b/libgcc/config/rs6000/ppc-floatundibf.c new file mode 100644 index 000000000000..bc972cb3bb0d --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatundibf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 64bit unsigned integer to bfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatundibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatundibf (UDItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatundibf_gpr (UDItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatunsibf.c b/libgcc/config/rs6000/ppc-floatunsibf.c new file mode 100644 index 000000000000..692bc4f16aee --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatunsibf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 32bit unsigned integer to IEEE half. + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/floatunssibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatunsibf (USItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatunsibf_gpr (USItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatuntibf.c b/libgcc/config/rs6000/ppc-floatuntibf.c new file mode 100644 index 000000000000..0753fc6baa64 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatuntibf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 128bit unsigned integer to bfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatuntibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar tyhpe. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatuntibf (UTItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatuntibf_gpr (UTItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/sfp-machine.h b/libgcc/config/rs6000/sfp-machine.h index b6dd03a710e3..8fe69e539243 100644 --- a/libgcc/config/rs6000/sfp-machine.h +++ b/libgcc/config/rs6000/sfp-machine.h @@ -170,39 +170,98 @@ void __sfp_handle_exceptions (int); /* Add prototypes for the HFmode and BFmode functions. */ typedef double DFtype2; typedef float SFtype2; -typedef int DItype2 __attribute__ ((mode (DI))); -typedef unsigned int UDItype2 __attribute__ ((mode (DI))); +typedef int HItype2 __attribute__ ((mode (HI))); +typedef unsigned int UHItype2 __attribute__ ((mode (HI))); typedef int SItype2 __attribute__ ((mode (SI))); typedef unsigned int USItype2 __attribute__ ((mode (SI))); +typedef int DItype2 __attribute__ ((mode (DI))); +typedef unsigned int UDItype2 __attribute__ ((mode (DI))); +typedef int TItype2 __attribute__ ((mode (TI))); +typedef unsigned int UTItype2 __attribute__ ((mode (TI))); + +/* We have 2 different conversion functions. One passes or returns the 16-bit + floating point type in a floating point register, and the other passes or + returns it in a general purpose register. If 16-bit floating point is + normally converted to the 32/64-bit scalar represention, we need a function + that does not do this conversion. */ +#define PASS_FP16(NAME, RET, FP16) \ +extern RET NAME (FP16); \ +extern RET NAME ## _gpr (UHItype2) + +#define PASS_FP16_2(NAME, RET, FP16) \ +extern RET NAME (FP16, FP16); \ +extern RET NAME ## _gpr (UHItype2, UHItype2) + +#define RETURN_FP16(NAME, FP16, ARG) \ +extern FP16 NAME (ARG); \ +extern UHItype2 NAME ## _gpr (ARG) #ifdef __FLOAT16__ typedef float HFtype2 __attribute__ ((mode (HF))); -extern CMPtype __eqhf2 (HFtype2, HFtype2); -extern DFtype2 __extendhfdf2 (HFtype2); -extern SFtype2 __extendhfsf2 (HFtype2); -extern DItype2 __fixhfdi (HFtype2); -extern SItype2 __fixhfsi (HFtype2); -extern UDItype2 __fixunshfdi (HFtype2); -extern USItype2 __fixunshfsi (HFtype2); -extern HFtype2 __floatdihf (DItype2); -extern HFtype2 __floatsihf (SItype2); -extern HFtype2 __floatundihf (UDItype2); -extern HFtype2 __floatunsihf (USItype2); -extern HFtype2 __truncdfhf2 (DFtype2); -extern HFtype2 __truncsfhf2 (SFtype2); +/* Move between HFtype and unsigned short. */ +union ushort_hf { + unsigned short us; + HFtype2 hf; +}; + +PASS_FP16_2 (__eqhf2, CMPtype, HFtype2); + +PASS_FP16 (__extendhfsf2, SFtype2, HFtype2); +PASS_FP16 (__extendhfdf2, DFtype2, HFtype2); + +PASS_FP16 (__fixhfsi, SItype2, HFtype2); +PASS_FP16 (__fixhfdi, DItype2, HFtype2); +PASS_FP16 (__fixhfti, TItype2, HFtype2); + +PASS_FP16 (__fixunshfsi, USItype2, HFtype2); +PASS_FP16 (__fixunshfdi, UDItype2, HFtype2); +PASS_FP16 (__fixunshfti, UTItype2, HFtype2); + +RETURN_FP16 (__floatsihf, HFtype2, SItype2); +RETURN_FP16 (__floatdihf, HFtype2, DItype2); +RETURN_FP16 (__floattihf, HFtype2, TItype2); + +RETURN_FP16 (__floatunsihf, HFtype2, USItype2); +RETURN_FP16 (__floatundihf, HFtype2, UDItype2); +RETURN_FP16 (__floatuntihf, HFtype2, UTItype2); + +RETURN_FP16 (__truncsfhf2, HFtype2, SFtype2); +RETURN_FP16 (__truncdfhf2, HFtype2, DFtype2); #endif #ifdef __BFLOAT16__ typedef float BFtype2 __attribute__ ((mode (BF))); -extern SFtype2 __extendbfsf2 (BFtype2); -extern BFtype2 __floatdibf (DItype2); -extern BFtype2 __floatsibf (SItype2); -extern BFtype2 __floatundibf (UDItype2); -extern BFtype2 __floatunsibf (USItype2); -extern BFtype2 __truncdfbf2 (DFtype2); -extern BFtype2 __truncsfbf2 (SFtype2); +/* Move between BFtype and unsigned short. */ +union ushort_bf { + unsigned short us; + BFtype2 bf; +}; + +PASS_FP16_2 (__eqbf2, CMPtype, BFtype2); + +PASS_FP16 (__extendbfsf2, SFtype2, BFtype2); +PASS_FP16 (__extendbfdf2, DFtype2, BFtype2); + +PASS_FP16 (__fixbfsi, SItype2, BFtype2); +PASS_FP16 (__fixbfdi, DItype2, BFtype2); +PASS_FP16 (__fixbfti, TItype2, BFtype2); + +PASS_FP16 (__fixunsbfsi, USItype2, BFtype2); +PASS_FP16 (__fixunsbfdi, UDItype2, BFtype2); +PASS_FP16 (__fixunsbfti, UTItype2, BFtype2); + +RETURN_FP16 (__floatsibf, BFtype2, SItype2); +RETURN_FP16 (__floatdibf, BFtype2, DItype2); +RETURN_FP16 (__floattibf, BFtype2, TItype2); + +RETURN_FP16 (__floatunsibf, BFtype2, USItype2); +RETURN_FP16 (__floatundibf, BFtype2, UDItype2); +RETURN_FP16 (__floatuntibf, BFtype2, UTItype2); + +RETURN_FP16 (__truncsfbf2, BFtype2, SFtype2); +RETURN_FP16 (__truncdfbf2, BFtype2, DFtype2); #endif #if defined(__FLOAT16__) && defined(__BFLOAT16__) diff --git a/libgcc/config/rs6000/t-float16 b/libgcc/config/rs6000/t-float16 index d42047b02d98..93d2ca31d18f 100644 --- a/libgcc/config/rs6000/t-float16 +++ b/libgcc/config/rs6000/t-float16 @@ -3,8 +3,8 @@ fp16_funcs_1 = eqhf2 \ fixhfsi fixhfdi fixhfti \ fixunshfsi fixunshfdi fixunshfti \ floatsihf floatdihf floattihf \ - floatunsihf floatundihf floatuntihf - + floatunsihf floatundihf floatuntihf \ + floatbitinthf fp16_src_1 = $(addprefix $(srcdir)/soft-fp/,$(addsuffix .c,$(fp16_funcs_1))) fp16_obj_1 = $(addsuffix $(objext),$(fp16_funcs_1)) @@ -26,14 +26,18 @@ FP16_CFLAGS = -mfloat16 -Wno-psabi \ $(fp16_obj) : INTERNAL_CFLAGS += $(FP16_CFLAGS) # __bf16 library support, source files in soft-ftp -bfp16_funcs_1 = floatsibf floatdibf floattibf \ - floatunsibf floatundibf floatuntibf +bfp16_funcs_1 = floatbitintbf bfp16_src_1 = $(addprefix $(srcdir)/soft-fp/,$(addsuffix .c,$(bfp16_funcs_1))) bfp16_obj_1 = $(addsuffix $(objext),$(bfp16_funcs_1)) # __bf16 library support, source files in config/rs6000 -bfp16_funcs_2 = extendbf-sfdf2 truncsfdf-bf2 +bfp16_funcs_2 = extendbf-sfdf2 truncsfdf-bf2 \ + ppc-floatsibf ppc-floatdibf ppc-floattibf \ + ppc-floatunsibf ppc-floatundibf ppc-floatuntibf \ + ppc-fixbfsi ppc-fixbfdi ppc-fixbfti \ + ppc-fixunsbfsi ppc-fixunsbfdi ppc-fixunsbfti + bfp16_src_2 = $(addprefix $(srcdir)/config/rs6000/,$(addsuffix .c,$(bfp16_funcs_2))) bfp16_obj_2 = $(addsuffix $(objext),$(bfp16_funcs_2)) diff --git a/libgcc/config/rs6000/truncsfdf-bf2.c b/libgcc/config/rs6000/truncsfdf-bf2.c index ccb9dc8742a8..6733c8df2419 100644 --- a/libgcc/config/rs6000/truncsfdf-bf2.c +++ b/libgcc/config/rs6000/truncsfdf-bf2.c @@ -28,9 +28,6 @@ This is a clone of soft-fp/truncdfbf2.c for the PowerPC. - We provide power8, and power10 versiosns of the conversion function and we - use an ifunc resolver to select the appropriate conversion to use. - We provide an alternative version of the conversion that retunrs the HFtype value as unsigned short. This is to allow the calling sequence where arguments are converted to the 32/64-bit scalar format. If we don't have @@ -41,43 +38,9 @@ #include "single.h" #include "double.h" -/* Union to convert between BFtype and unsigned short. */ -union ushort_bf { - unsigned short us; - BFtype bf; -}; - -/* Function and pointer to function prototypes. */ -typedef BFtype sf_to_bf_fpr_function_t (SFtype a); -typedef unsigned short sf_to_bf_gpr_function_t (SFtype a); - -typedef sf_to_bf_fpr_function_t *sf_to_bf_fpr_ptr_function_t; -typedef sf_to_bf_gpr_function_t *sf_to_bf_gpr_ptr_function_t; - -static sf_to_bf_fpr_ptr_function_t __truncsfbf2_ifunc (void); -static sf_to_bf_gpr_ptr_function_t __truncsfbf2_gpr_ifunc (void); - -static sf_to_bf_fpr_function_t __truncsfbf2_p8 - __attribute__ ((__target__ ("cpu=power8"))); - -static sf_to_bf_gpr_function_t __truncsfbf2_gpr_p8 - __attribute__ ((__target__ ("cpu=power8"))); - -static sf_to_bf_fpr_function_t __truncsfbf2_p10 - __attribute__ ((__target__ ("cpu=power10"))); - -static sf_to_bf_gpr_function_t __truncsfbf2_gpr_p10 - __attribute__ ((__target__ ("cpu=power10"))); - -extern sf_to_bf_fpr_function_t __truncsfbf2 - __attribute__ ((__ifunc__ ("__truncsfbf2_ifunc"))); - -extern sf_to_bf_gpr_function_t __truncsfbf2_gpr - __attribute__ ((__ifunc__ ("__truncsfbf2_gpr_ifunc"))); - -/* Power8, return BFtype in a FPR register, no hardware support. */ -static BFtype -__truncsfbf2_p8 (SFtype a) +/* Return BFtype in a FPR register. */ +BFtype +__truncsfbf2 (SFtype a) { FP_DECL_EX; FP_DECL_S (A); @@ -97,9 +60,9 @@ __truncsfbf2_p8 (SFtype a) return r; } -/* Power8, return BFtype in a GPR register, no hardware support. */ -static unsigned short -__truncsfbf2_gpr_p8 (SFtype a) +/* Return BFtype in a GPR register. */ +unsigned short +__truncsfbf2_gpr (SFtype a) { union ushort_bf u; @@ -122,39 +85,6 @@ __truncsfbf2_gpr_p8 (SFtype a) return u.us; } -/* Power10, return BFtype in a FPR register, use XVCVSPBF16. */ -static BFtype -__truncsfbf2_p10 (SFtype a) -{ - return (BFtype) a; -} - -/* Power9, return BFtype in a GPR register, use XVCVSPBF16. */ -static unsigned short -__truncsfbf2_gpr_p10 (SFtype a) -{ - union ushort_bf u; - u.bf = a; - return u.us; -} - -/* Resolve ifunc declarations for SFtype to BFtype. */ -static sf_to_bf_fpr_ptr_function_t -__truncsfbf2_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_1") - ? __truncsfbf2_p10 - : __truncsfbf2_p8); -} - -static sf_to_bf_gpr_ptr_function_t -__truncsfbf2_gpr_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_1") - ? __truncsfbf2_gpr_p10 - : __truncsfbf2_gpr_p8); -} - /* On the PowerPC DFtype scalars use the same encoding as SFtype, so use the same function for both. */ __asm__ ("\n" diff --git a/libgcc/config/rs6000/truncsfdf-hf2.c b/libgcc/config/rs6000/truncsfdf-hf2.c index 4ee28daa74d9..c2392e60262b 100644 --- a/libgcc/config/rs6000/truncsfdf-hf2.c +++ b/libgcc/config/rs6000/truncsfdf-hf2.c @@ -28,9 +28,6 @@ This is a clone of soft-fp/truncsfhf2.c for the PowerPC. - We provide power8, and power9 versiosns of the conversion function and we - use an ifunc resolver to select the appropriate conversion to use. - We provide an alternative version of the conversion that retunrs the HFtype value as unsigned short. This is to allow the calling sequence where arguments are converted to the 32/64-bit scalar format. If we don't have @@ -41,46 +38,9 @@ #include "single.h" #include "double.h" -/* Union to convert between HFtype and unsigned short. */ -union ushort_hf { - unsigned short us; - HFtype hf; -}; - -/* Function and pointer to function prototypes. */ -typedef HFtype sf_to_hf_fpr_function_t (SFtype a); -typedef unsigned short sf_to_hf_gpr_function_t (SFtype a); - -typedef sf_to_hf_fpr_function_t *sf_to_hf_fpr_ptr_function_t; -typedef sf_to_hf_gpr_function_t *sf_to_hf_gpr_ptr_function_t; - -static sf_to_hf_fpr_ptr_function_t __truncsfhf2_ifunc (void); -static sf_to_hf_gpr_ptr_function_t __truncsfhf2_gpr_ifunc (void); - -static sf_to_hf_fpr_function_t __truncsfhf2_p8 - __attribute__ ((__target__ ("cpu=power8"))); - -static sf_to_hf_gpr_function_t __truncsfhf2_gpr_p8 - __attribute__ ((__target__ ("cpu=power8"))); - -static sf_to_hf_fpr_function_t __truncsfhf2_p9 - __attribute__ ((__target__ ("cpu=power9"))); - -static sf_to_hf_gpr_function_t __truncsfhf2_gpr_p9 - __attribute__ ((__target__ ("cpu=power9"))); - -extern sf_to_hf_fpr_function_t __truncsfhf2 - __attribute__ ((__ifunc__ ("__truncsfhf2_ifunc"))); - -extern sf_to_hf_gpr_function_t __truncsfhf2_gpr - __attribute__ ((__ifunc__ ("__truncsfhf2_gpr_ifunc"))); - -extern HFtype __truncdfhf2 (DFtype a); -extern unsigned short __truncdfhf2_gpr (DFtype a); - -/* Power8, return HFtype in a FPR register, no hardware support. */ -static HFtype -__truncsfhf2_p8 (SFtype a) +/* Return HFtype in a FPR register. */ +HFtype +__truncsfhf2 (SFtype a) { FP_DECL_EX; FP_DECL_S (A); @@ -96,9 +56,9 @@ __truncsfhf2_p8 (SFtype a) return r; } -/* Power8, return HFtype in a GPR register, no hardware support. */ -static unsigned short -__truncsfhf2_gpr_p8 (SFtype a) +/* Return HFtype in a GPR register. */ +unsigned short +__truncsfhf2_gpr (SFtype a) { union ushort_hf u; @@ -117,39 +77,6 @@ __truncsfhf2_gpr_p8 (SFtype a) return u.us; } -/* Power9, return HFtype in a FPR register, use XSCVSPDPN. */ -static HFtype -__truncsfhf2_p9 (SFtype a) -{ - return (HFtype) a; -} - -/* Power9, return HFtype in a GPR register, use XSCVSPDPN. */ -static unsigned short -__truncsfhf2_gpr_p9 (SFtype a) -{ - union ushort_hf u; - u.hf = a; - return u.us; -} - -/* Resolve ifunc declarations for SFtype to HFtype. */ -static sf_to_hf_fpr_ptr_function_t -__truncsfhf2_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_00") - ? __truncsfhf2_p9 - : __truncsfhf2_p8); -} - -static sf_to_hf_gpr_ptr_function_t -__truncsfhf2_gpr_ifunc (void) -{ - return (__builtin_cpu_supports ("arch_3_00") - ? __truncsfhf2_gpr_p9 - : __truncsfhf2_gpr_p8); -} - /* On the PowerPC DFtype scalars use the same encoding as SFtype, so use the same function for both. */ __asm__ ("\n"
