https://gcc.gnu.org/g:f7f86ac3b26b6dd5e165e51d340f620d48474acc
commit f7f86ac3b26b6dd5e165e51d340f620d48474acc Author: Michael Meissner <[email protected]> Date: Wed Sep 30 16:01:05 2026 -0400 Pass and return 16-bit fp library values in GPRs This patch changes all of the 16-bit floating point library functions to pass and return 16-bit floating point values as unsigned short. The intention is to prepare for modifying the calling sequence so that the values are converted to 32/64-bit scalar floating point. However, we can't call the library functions which are used to do the conversion if we have to convert the argument on a machine that does not have native conversion instructions. 2026-09-30 Michael Meissner <[email protected]> gcc/ * config/rs6000/rs6000-call.cc (FP16_USE_GPR): New macro. (USE_FP_FOR_ARG_P) Add support for 16-bit fp library functions passing 16-bit fp in GPR registers. (init_cumulative_args): Print name and if it is a library function if -mdebug=ag. * config/rs6000/rs6000.cc (rs6000_debug_reg_global): Print 16-bit floating point information if -mdebug=reg. (init_float16): Mark all of the 16-bit floating point library functions as passing/returning 16-bit floating point values in GPR registers and change the name to have a '_gpr' suffix. (rs6000_init_libfuncs): Likewise. (rs6000_opt_vars): Add -mfloat16-gpr-convert switch. * config/rs6000/rs6000.opt (-mfloat16-gpr-convert): New switch. libgcc/ * config/rs6000/extendbf-sfdf2.c: New file. * config/rs6000/extendhf-sfdf2.c: Likewise. * config/rs6000/ppc-eqbf2.c: Likewise. * config/rs6000/ppc-eqhf2.c: Likewise. * config/rs6000/ppc-fixbfbitint.c: Likewise. * config/rs6000/ppc-fixbfdi.c: Likewise. * config/rs6000/ppc-fixbfdi.c: Likewise. * config/rs6000/ppc-fixbfdi.c: Likewise. * config/rs6000/ppc-fixhfbitint.c: Likewise. * config/rs6000/ppc-fixhfdi.c: Likewise. * config/rs6000/ppc-fixhfsi.c: Likewise. * config/rs6000/ppc-fixhfti.c: Likewise. * config/rs6000/ppc-fixunsbfdi.c: Likewise. * config/rs6000/ppc-fixunsbfsi.c: Likewise. * config/rs6000/ppc-fixunsbfti.c: Likewise. * config/rs6000/ppc-fixunshfdi.c: Likewise. * config/rs6000/ppc-fixunshfsi.c: Likewise. * config/rs6000/ppc-fixunshfti.c: Likewise. * config/rs6000/ppc-floatbitintbf.c: Likewise. * config/rs6000/ppc-floatbitinthf.c: Likewise. * config/rs6000/ppc-floatdibf.c: Likewise. * config/rs6000/ppc-floatdihf.c: Likewise. * config/rs6000/ppc-floatsibf.c: Likewise. * config/rs6000/ppc-floatsihf.c: Likewise. * config/rs6000/ppc-floattibf.c: Likewise. * config/rs6000/ppc-floattihf.c: Likewise. * config/rs6000/ppc-floatundibf.c: Likewise. * config/rs6000/ppc-floatundihf.c: Likewise. * config/rs6000/ppc-floatunsibf.c: Likewise. * config/rs6000/ppc-floatunsihf.c: Likewise. * config/rs6000/ppc-floatuntibf.c: Likewise. * config/rs6000/ppc-floatuntihf.c: Likewise. * config/rs6000/ppc-truncbfhf2.c: Likewise. * config/rs6000/sfp-machine.h: Add declarations for declaring the *_gpr library functions. * config/rs6000/t-float16: Build all of the new 16-bit floating point conversion functions that pass and return 16-bit floating point in GPR registers. * config/rs6000/truncsfdf-bf2.c: New file. * config/rs6000/truncsfdf-hf2.c: Likewise. Diff: --- gcc/config/rs6000/rs6000-call.cc | 23 ++++-- gcc/config/rs6000/rs6000.cc | 131 +++++++++++++++++++++++++++++++ gcc/config/rs6000/rs6000.opt | 4 + libgcc/config/rs6000/extendbf-sfdf2.c | 90 +++++++++++++++++++++ libgcc/config/rs6000/extendhf-sfdf2.c | 90 +++++++++++++++++++++ libgcc/config/rs6000/ppc-eqbf2.c | 83 ++++++++++++++++++++ libgcc/config/rs6000/ppc-eqhf2.c | 83 ++++++++++++++++++++ libgcc/config/rs6000/ppc-fixbfbitint.c | 128 ++++++++++++++++++++++++++++++ libgcc/config/rs6000/ppc-fixbfdi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixbfsi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixbfti.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixhfbitint.c | 127 ++++++++++++++++++++++++++++++ libgcc/config/rs6000/ppc-fixhfdi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixhfsi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixhfti.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixunsbfdi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixunsbfsi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixunsbfti.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixunshfdi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixunshfsi.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-fixunshfti.c | 71 +++++++++++++++++ libgcc/config/rs6000/ppc-floatbitintbf.c | 102 ++++++++++++++++++++++++ libgcc/config/rs6000/ppc-floatbitinthf.c | 102 ++++++++++++++++++++++++ libgcc/config/rs6000/ppc-floatdibf.c | 69 ++++++++++++++++ libgcc/config/rs6000/ppc-floatdihf.c | 69 ++++++++++++++++ libgcc/config/rs6000/ppc-floatsibf.c | 69 ++++++++++++++++ libgcc/config/rs6000/ppc-floatsihf.c | 69 ++++++++++++++++ libgcc/config/rs6000/ppc-floattibf.c | 69 ++++++++++++++++ libgcc/config/rs6000/ppc-floattihf.c | 69 ++++++++++++++++ libgcc/config/rs6000/ppc-floatundibf.c | 68 ++++++++++++++++ libgcc/config/rs6000/ppc-floatundihf.c | 68 ++++++++++++++++ libgcc/config/rs6000/ppc-floatunsibf.c | 68 ++++++++++++++++ libgcc/config/rs6000/ppc-floatunsihf.c | 68 ++++++++++++++++ libgcc/config/rs6000/ppc-floatuntibf.c | 68 ++++++++++++++++ libgcc/config/rs6000/ppc-floatuntihf.c | 68 ++++++++++++++++ libgcc/config/rs6000/ppc-truncbfhf2.c | 130 ++++++++++++++++++++++++++++++ libgcc/config/rs6000/ppc-trunchfbf2.c | 96 ++++++++++++++++++++++ libgcc/config/rs6000/sfp-machine.h | 111 ++++++++++++++++++++------ libgcc/config/rs6000/t-float16 | 40 +++++----- libgcc/config/rs6000/truncsfdf-bf2.c | 95 ++++++++++++++++++++++ libgcc/config/rs6000/truncsfdf-hf2.c | 87 ++++++++++++++++++++ 41 files changed, 3149 insertions(+), 47 deletions(-) diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc index 790f86218870..e970f63f2f08 100644 --- a/gcc/config/rs6000/rs6000-call.cc +++ b/gcc/config/rs6000/rs6000-call.cc @@ -81,10 +81,17 @@ #define TARGET_NO_PROTOTYPE 0 #endif -/* Nonzero if we can use a floating-point register to pass this arg. */ -#define USE_FP_FOR_ARG_P(CUM,MODE) \ - (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) \ - && (CUM)->fregno <= FP_ARG_MAX_REG \ +/* Whether we pass 16-bit floating point values in GPRs for library + calls. */ +#define FP16_USE_GPR(MODE, LIBCALL) \ + (FP16_SCALAR_MODE_P (MODE) && TARGET_FLOAT16_GPR_CONVERT && LIBCALL) + +/* Nonzero if we can use a floating-point register to pass this arg. 16-bit + floating point arguments to library functions are passed as ints. */ +#define USE_FP_FOR_ARG_P(CUM,MODE) \ + (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) \ + && !FP16_USE_GPR (MODE, (CUM)->libcall) \ + && (CUM)->fregno <= FP_ARG_MAX_REG \ && TARGET_HARD_FLOAT) /* Nonzero if we can use an AltiVec register to pass this arg. */ @@ -590,7 +597,7 @@ call_ABI_of_interest (tree fndecl) void init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, - rtx libname ATTRIBUTE_UNUSED, int incoming, + rtx libname, int incoming, int libcall, int n_named_args, tree fndecl, machine_mode return_mode ATTRIBUTE_UNUSED) @@ -653,6 +660,12 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, if (cum->call_cookie & CALL_LONG) fprintf (stderr, " longcall,"); + if (libname) + fprintf (stderr, " name=%s,", XSTR (libname, 0)); + + if (libcall) + fprintf (stderr, " libcall,"); + fprintf (stderr, " proto = %d, nargs = %d\n", cum->prototype, cum->nargs_prototype); } diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 6ccd766e5c9b..6e4c13ecd523 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -2636,6 +2636,33 @@ rs6000_debug_reg_global (void) if (TARGET_DIRECT_MOVE_128) fprintf (stderr, DEBUG_FMT_D, "VSX easy 64-bit mfvsrld element", (int)VECTOR_ELEMENT_MFVSRLD_64BIT); + + if (TARGET_FLOAT16) + { + fprintf (stderr, DEBUG_FMT_S, "_Float16", + (TARGET_FLOAT16_HW ? "hardware" : "software")); + fprintf (stderr, DEBUG_FMT_S, "__bf16", + (TARGET_BFLOAT16_HW ? "hardware" : "software")); + fprintf (stderr, DEBUG_FMT_S, "-mfloat16-gpr-convert", + (TARGET_FLOAT16_GPR_CONVERT ? "yes" : "no")); + +#if POWERPC_FLOAT16_DEFAULT + fprintf (stderr, DEBUG_FMT_S, "float16 configured", "enabled"); +#else + fprintf (stderr, DEBUG_FMT_S, "float16 configured", "disabled"); +#endif + +#if POWERPC_FLOAT16_DISABLE_WARNING + fprintf (stderr, DEBUG_FMT_S, "float16 call warnings", "disabled"); +#else + fprintf (stderr, DEBUG_FMT_S, "float16 call warnings", "enabled"); +#endif + } + else + { + fprintf (stderr, DEBUG_FMT_S, "_Float16", "disabled"); + fprintf (stderr, DEBUG_FMT_S, "__bf16", "disabled"); + } } @@ -11837,6 +11864,101 @@ init_float128_ieee (machine_mode mode) } } +/* For 16-bit floating point, mark the identifier of the conversion functions + so they pass/register the HFmode and BFmode in a GPR register rather than a + floating point register. Thus if HFmode/BFmode are converted to DFmode for + passing and returning values, we can do the conversion on machines that + don't have the conversions. */ + +static void +init_float16 (void) +{ + char fname[80]; + + /* Map mode to a string. */ + struct mode_string { + const enum machine_mode mode; + const char *const name; + }; + + const static struct mode_string fp16_modes[] = { + { E_BFmode, "bf" }, + { E_HFmode, "hf" }, + }; + + const static struct mode_string fp_modes[] = { + { E_SFmode, "sf" }, + { E_DFmode, "df" }, + }; + + const static struct mode_string int_modes[] = { + { E_SImode, "si" }, + { E_DImode, "di" }, + { E_TImode, "ti" }, + }; + + for (size_t i = 0; i < ARRAY_SIZE (fp16_modes); i++) + { + enum machine_mode fp16_mode = fp16_modes[i].mode; + const char *fp16_name = fp16_modes[i].name; + + /* Conversions between {SFmode,DFmode} <=> {BFmode,HFmode}. */ + for (size_t j = 0; j < ARRAY_SIZE (fp_modes); j++) + { + enum machine_mode fp_mode = fp_modes[j].mode; + const char *fp_name = fp_modes[j].name; + + sprintf (fname, "__extend%s%s2_gpr", fp16_name, fp_name); + set_conv_libfunc (sext_optab, fp_mode, fp16_mode, fname); + + sprintf (fname, "__trunc%s%s2_gpr", fp_name, fp16_name); + set_conv_libfunc (trunc_optab, fp16_mode, fp_mode, fname); + } + + /* Conversions between {SImode,DImode} <=> {BFmode,HFmode}. */ + for (size_t j = 0; j < ARRAY_SIZE (int_modes); j++) + { + enum machine_mode int_mode = int_modes[j].mode; + const char *int_name = int_modes[j].name; + + if (int_mode == SImode || TARGET_POWERPC64) + { + sprintf (fname, "__float%s%s2_gpr", int_name, fp16_name); + set_conv_libfunc (sfloat_optab, fp16_mode, int_mode, fname); + + sprintf (fname, "__floatuns%s%s2_gpr", int_name, fp16_name); + set_conv_libfunc (ufloat_optab, fp16_mode, int_mode, fname); + + sprintf (fname, "__fix_trunc%s%s2_gpr", fp16_name, int_name); + set_conv_libfunc (sfix_optab, int_mode, fp16_mode, fname); + + sprintf (fname, "__fixuns_trunc%s%s2_gpr", fp16_name, int_name); + set_conv_libfunc (ufix_optab, int_mode, fp16_mode, fname); + } + } + + /* Conversions between the two 16-bit floating point formats. */ + for (size_t j = 0; j < ARRAY_SIZE (fp16_modes); j++) + { + enum machine_mode fp16_mode2 = fp16_modes[j].mode; + const char *fp16_name2 = fp16_modes[j].name; + + if (fp16_mode != fp16_mode2) + { + sprintf (fname, "__trunc%s%s2_gpr", fp16_name, fp16_name2); + set_conv_libfunc (trunc_optab, fp16_mode2, fp16_mode, fname); + } + } + + /* Bitint support. */ + sprintf (fname, "__floatbitint%s_gpr", fp16_name); + set_optab_libfunc (bitinttofp_optab, fp16_mode, fname); + + sprintf (fname, "__fix%sbitint_gpr", fp16_name); + set_optab_libfunc (bitintfromfp_optab, fp16_mode, fname); + } +} + static void rs6000_init_libfuncs (void) { @@ -11857,6 +11979,10 @@ rs6000_init_libfuncs (void) else init_float128_ieee (TFmode); } + + /* 16-bit float support functions. */ + if (TARGET_FLOAT16 && TARGET_FLOAT16_GPR_CONVERT) + init_float16 (); } /* Emit a potentially record-form instruction, setting DST from SRC. @@ -24450,6 +24576,8 @@ rs6000_libcall_value (machine_mode mode) if (DECIMAL_FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT) /* _Decimal128 must use an even/odd register pair. */ regno = (mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN; + else if (FP16_SCALAR_MODE_P (mode) && TARGET_FLOAT16_GPR_CONVERT) + regno = GP_ARG_RETURN; else if (SCALAR_FLOAT_MODE_NOT_VECTOR_P (mode) && TARGET_HARD_FLOAT) regno = FP_ARG_RETURN; /* VSX is a superset of Altivec and adds V2DImode/V2DFmode. Since the same @@ -25042,6 +25170,9 @@ static struct rs6000_opt_var const rs6000_opt_vars[] = { "speculate-indirect-jumps", offsetof (struct gcc_options, x_rs6000_speculate_indirect_jumps), offsetof (struct cl_target_option, x_rs6000_speculate_indirect_jumps), }, + { "float16-gpr-convert", + offsetof (struct gcc_options, x_TARGET_FLOAT16_GPR_CONVERT), + offsetof (struct cl_target_option, x_TARGET_FLOAT16_GPR_CONVERT), }, }; /* Inner function to handle attribute((target("..."))) and #pragma GCC target diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 28f679ff69c7..973051afc350 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -646,6 +646,10 @@ mfloat16 Target Mask(FLOAT16) Var(rs6000_isa_flags) Enable or disable 16-bit floating point. +mfloat16-gpr-convert +Target Undocumented Var(TARGET_FLOAT16_GPR_CONVERT) Init(1) Save +Pass/return (do not pass/return) 16-it float conversions in GPR registers. + ; Documented parameters -param=rs6000-vect-unroll-limit= diff --git a/libgcc/config/rs6000/extendbf-sfdf2.c b/libgcc/config/rs6000/extendbf-sfdf2.c new file mode 100644 index 000000000000..b46805e998cf --- /dev/null +++ b/libgcc/config/rs6000/extendbf-sfdf2.c @@ -0,0 +1,90 @@ +/* Software floating-point emulation. + Return an bfloat16 converted to IEEE single + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of soft-fp/extendbfsf2.c for the PowerPC. + + We provide an alternative version of the conversion that takes the value in + a GPR passed as an unsigned short. This is to allow the calling sequence + where arguments are converted to the 32/64-bit scalar format. If we don't + have the hardware support, we can't use the standard __extend function. */ + +#define FP_NO_EXACT_UNDERFLOW +#include "soft-fp.h" +#include "brain.h" +#include "single.h" +#include "double.h" + +/* BFtype passed in FPR register. */ +SFtype +__extendbfsf2 (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + FP_DECL_S (R); + SFtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_EXTEND (S, B, 1, 1, R, A); + FP_PACK_RAW_S (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* BFtype passed in GPR register. */ +SFtype +__extendbfsf2_gpr (unsigned short us) +{ + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_DECL_EX; + FP_DECL_B (A); + FP_DECL_S (R); + SFtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_EXTEND (S, B, 1, 1, R, A); + FP_PACK_RAW_S (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* On the PowerPC DFtype scalars use the same encoding as SFtype, so we can use + the same function for both. */ +__asm__ ("\t.globl __extendbfdf2\n" + "__extendbfdf2 = __extendbfsf2\n" + "\n" + "\t.globl __extendbfdf2_gpr\n" + "__extendbfdf2_gpr = __extendbfsf2_gpr"); diff --git a/libgcc/config/rs6000/extendhf-sfdf2.c b/libgcc/config/rs6000/extendhf-sfdf2.c new file mode 100644 index 000000000000..58fe008dbcae --- /dev/null +++ b/libgcc/config/rs6000/extendhf-sfdf2.c @@ -0,0 +1,90 @@ +/* Software floating-point emulation. + Return an IEEE half converted to IEEE single + Copyright (C) 2021-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of soft-fp/extendhfsf2.c for the PowerPC. + + We provide an alternative version of the conversion that takes the value in + a GPR passed as an unsigned short. This is to allow the calling sequence + where arguments are converted to the 32/64-bit scalar format. If we don't + have the hardware support, we can't use the standard __extend function. */ + +#define FP_NO_EXACT_UNDERFLOW +#include "soft-fp.h" +#include "half.h" +#include "single.h" +#include "double.h" + +/* HFtype passed in FPR register. */ +SFtype +__extendhfsf2 (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_S (R); + SFtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_EXTEND (S, H, 1, 1, R, A); + FP_PACK_RAW_S (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* HFtype passed in GPR register. */ +SFtype +__extendhfsf2_gpr (unsigned short us) +{ + union ushort_hf u; + HFtype a; + + u.us = us; + a = u.hf; + + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_S (R); + SFtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_EXTEND (S, H, 1, 1, R, A); + FP_PACK_RAW_S (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* On the PowerPC DFtype scalars use the same encoding as SFtype, so use the + same function for both. */ +__asm__ ("\t.globl __extendhfdf2\n" + "__extendhfdf2 = __extendhfsf2\n" + "\n" + "\t.globl __extendhfdf2_gpr\n" + "__extendhfdf2_gpr = __extendhfsf2_gpr"); diff --git a/libgcc/config/rs6000/ppc-eqbf2.c b/libgcc/config/rs6000/ppc-eqbf2.c new file mode 100644 index 000000000000..a43b6b673282 --- /dev/null +++ b/libgcc/config/rs6000/ppc-eqbf2.c @@ -0,0 +1,83 @@ +/* Software floating-point emulation. + Return 0 iff a == b, 1 otherwise + Copyright (C) 2021-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/eqhf2.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +/* When BFtype is passed in FPR registers. */ +CMPtype +__eqbf2 (BFtype a, BFtype b) +{ + FP_DECL_EX; + FP_DECL_B (A); + FP_DECL_B (B); + CMPtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_UNPACK_RAW_B (B, b); + FP_CMP_EQ_B (r, A, B, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +strong_alias (__eqbf2, __nebf2); + +/* When BFtype is passed in GPR registers. */ +CMPtype +__eqbf2_gpr (unsigned short us_a, unsigned short us_b) +{ + FP_DECL_EX; + FP_DECL_B (A); + FP_DECL_B (B); + CMPtype r; + union ushort_bf u_a, u_b; + BFtype a, b; + + u_a.us = us_a; + u_b.us = us_b; + a = u_a.bf; + b = u_b.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_UNPACK_RAW_B (B, b); + FP_CMP_EQ_B (r, A, B, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +strong_alias (__eqbf2_gpr, __nebf2_gpr); diff --git a/libgcc/config/rs6000/ppc-eqhf2.c b/libgcc/config/rs6000/ppc-eqhf2.c new file mode 100644 index 000000000000..e6c8dabf5b1c --- /dev/null +++ b/libgcc/config/rs6000/ppc-eqhf2.c @@ -0,0 +1,83 @@ +/* Software floating-point emulation. + Return 0 iff a == b, 1 otherwise + Copyright (C) 2021-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/eqhf2.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +/* When HFtype is passed in FPR registers. */ +CMPtype +__eqhf2 (HFtype a, HFtype b) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_H (B); + CMPtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_UNPACK_RAW_H (B, b); + FP_CMP_EQ_H (r, A, B, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +strong_alias (__eqhf2, __nehf2); + +/* When HFtype is passed in GPR registers. */ +CMPtype +__eqhf2_gpr (unsigned short us_a, unsigned short us_b) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_H (B); + CMPtype r; + union ushort_hf u_a, u_b; + HFtype a, b; + + u_a.us = us_a; + u_b.us = us_b; + a = u_a.hf; + b = u_b.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_UNPACK_RAW_H (B, b); + FP_CMP_EQ_H (r, A, B, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +strong_alias (__eqhf2_gpr, __nehf2_gpr); diff --git a/libgcc/config/rs6000/ppc-fixbfbitint.c b/libgcc/config/rs6000/ppc-fixbfbitint.c new file mode 100644 index 000000000000..3271912dc260 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfbitint.c @@ -0,0 +1,128 @@ +/* Software floating-point emulation. + Convert IEEE single to signed or unsigned _BitInt. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/fixsfbit.c + +We provide 2 conversions, one that passes the BFtype in a floating point +register and the other returns it in a general purpose register that is used +when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ +/* Silence declaration without prototype warning. */ +extern void __fixbfbitint (UBILtype *, SItype, BFtype); +extern void __fixbfbitint_gpr (UBILtype *, SItype, unsigned short); + +/* BFtype is passed in FPR registers. */ +void +__fixbfbitint (UBILtype *r, SItype rprec, BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_B || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_B < _FP_EXPBIAS_B + arprec + ? _FP_EXPMAX_B + : _FP_EXPBIAS_B + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_B + arprec - 1 + && A_e < _FP_EXPMAX_B) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_B + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_B + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_B (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} + +/* BFtype is passed in GPR registers. */ +void +__fixbfbitint_gpr (UBILtype *r, SItype rprec, unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + BFtype a; + union ushort_bf u; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_B || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_B < _FP_EXPBIAS_B + arprec + ? _FP_EXPMAX_B + : _FP_EXPBIAS_B + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_B + arprec - 1 + && A_e < _FP_EXPMAX_B) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_B + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_B + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_B (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} +#endif diff --git a/libgcc/config/rs6000/ppc-fixbfdi.c b/libgcc/config/rs6000/ppc-fixbfdi.c new file mode 100644 index 000000000000..f263ae961029 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfdi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert a IEEE half to 64bit signed integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfdi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +DItype +__fixbfdi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +DItype +__fixbfdi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixbfsi.c b/libgcc/config/rs6000/ppc-fixbfsi.c new file mode 100644 index 000000000000..13b8f1db97e7 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfsi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 32bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfsi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +SItype +__fixbfsi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +SItype +__fixbfsi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixbfti.c b/libgcc/config/rs6000/ppc-fixbfti.c new file mode 100644 index 000000000000..1cbabe9c715d --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfti.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 128bit signed integer + Copyright (C) 2007-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfti.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +TItype +__fixbfti (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +TItype +__fixbfti_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixhfbitint.c b/libgcc/config/rs6000/ppc-fixhfbitint.c new file mode 100644 index 000000000000..bb1818ec0695 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixhfbitint.c @@ -0,0 +1,127 @@ +/* Software floating-point emulation. + Convert IEEE single to signed or unsigned _BitInt. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/fixsfbit.c + +We provide 2 conversions, one that passes the HFtype in a floating point +register and the other returns it in a general purpose register that is used +when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ +extern void __fixhfbitint (UBILtype *, SItype, HFtype); +extern void __fixhfbitint_gpr (UBILtype *, SItype, unsigned short); + +/* HFtype is passed in FPR registers. */ +void +__fixhfbitint (UBILtype *r, SItype rprec, HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_H || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_H < _FP_EXPBIAS_H + arprec + ? _FP_EXPMAX_H + : _FP_EXPBIAS_H + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_H + arprec - 1 + && A_e < _FP_EXPMAX_H) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_H + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_H + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_H (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} + +/* HFtype is passed in GPR registers. */ +void +__fixhfbitint_gpr (UBILtype *r, SItype rprec, unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + HFtype a; + union ushort_hf u; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_H || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_H < _FP_EXPBIAS_H + arprec + ? _FP_EXPMAX_H + : _FP_EXPBIAS_H + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_H + arprec - 1 + && A_e < _FP_EXPMAX_H) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_H + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_H + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_H (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} +#endif diff --git a/libgcc/config/rs6000/ppc-fixhfdi.c b/libgcc/config/rs6000/ppc-fixhfdi.c new file mode 100644 index 000000000000..ff7070de0562 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixhfdi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert a IEEE half to 64bit signed integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfdi.c + + We provide 2 conversions, one that takes the HFtype in a floating point + register and the other takes it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +DItype +__fixhfdi (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + UDItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, DI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +DItype +__fixhfdi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + UDItype r; + union ushort_hf u; + HFtype a; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, DI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixhfsi.c b/libgcc/config/rs6000/ppc-fixhfsi.c new file mode 100644 index 000000000000..5031f7ffa0bf --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixhfsi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 32bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfsi.c + + We provide 2 conversions, one that takes the HFtype in a floating point + register and the other takes it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +SItype +__fixhfsi (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, SI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +SItype +__fixhfsi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype r; + union ushort_hf u; + HFtype a; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, SI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixhfti.c b/libgcc/config/rs6000/ppc-fixhfti.c new file mode 100644 index 000000000000..4e7432c3c408 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixhfti.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 128bit signed integer + Copyright (C) 2007-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfti.c + + We provide 2 conversions, one that takes the HFtype in a floating point + register and the other takes it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +TItype +__fixhfti (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, TI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +TItype +__fixhfti_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + UTItype r; + union ushort_hf u; + HFtype a; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, TI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunsbfdi.c b/libgcc/config/rs6000/ppc-fixunsbfdi.c new file mode 100644 index 000000000000..8ed6eab9554f --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunsbfdi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 64bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfdi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +UDItype +__fixunsbfdi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +UDItype +__fixunsbfdi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UDItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, DI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunsbfsi.c b/libgcc/config/rs6000/ppc-fixunsbfsi.c new file mode 100644 index 000000000000..75d492fde582 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunsbfsi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 32bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixunsbfsi.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +USItype +__fixunsbfsi (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +USItype +__fixunsbfsi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, SI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunsbfti.c b/libgcc/config/rs6000/ppc-fixunsbfti.c new file mode 100644 index 000000000000..52b8f5c32dce --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunsbfti.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 128bit unsigned integer + Copyright (C) 2007-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhunshfti.c + + We provide 2 conversions, one that takes the BFtype in a floating point + register and the other takes it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +UTItype +__fixunsbfti (BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +UTItype +__fixunsbfti_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + UTItype r; + union ushort_bf u; + BFtype a; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + FP_TO_INT_B (r, A, TI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunshfdi.c b/libgcc/config/rs6000/ppc-fixunshfdi.c new file mode 100644 index 000000000000..0a694afa8387 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunshfdi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 64bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhfdi.c + + We provide 2 conversions, one that takes the HFtype in a floating point + register and the other takes it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +UDItype +__fixunshfdi (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + UDItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, DI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +UDItype +__fixunshfdi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + UDItype r; + union ushort_hf u; + HFtype a; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, DI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunshfsi.c b/libgcc/config/rs6000/ppc-fixunshfsi.c new file mode 100644 index 000000000000..fbc30ba3cb7c --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunshfsi.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 32bit unsigned integer + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/fixunshfsi.c + + We provide 2 conversions, one that takes the HFtype in a floating point + register and the other takes it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +USItype +__fixunshfsi (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, SI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +USItype +__fixunshfsi_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype r; + union ushort_hf u; + HFtype a; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, SI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-fixunshfti.c b/libgcc/config/rs6000/ppc-fixunshfti.c new file mode 100644 index 000000000000..38a98c3aeeaa --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixunshfti.c @@ -0,0 +1,71 @@ +/* Software floating-point emulation. + Convert IEEE half to 128bit unsigned integer + Copyright (C) 2007-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/fixhunshfti.c + + We provide 2 conversions, one that takes the HFtype in a floating point + register and the other takes it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +UTItype +__fixunshfti (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, TI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +UTItype +__fixunshfti_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + UTItype r; + union ushort_hf u; + HFtype a; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_TO_INT_H (r, A, TI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/libgcc/config/rs6000/ppc-floatbitintbf.c b/libgcc/config/rs6000/ppc-floatbitintbf.c new file mode 100644 index 000000000000..bc3be1ed8886 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatbitintbf.c @@ -0,0 +1,102 @@ +/* Software floating-point emulation. + Convert a _BitInt to bfloat16. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/floatbitintbf.c. + +We provide 2 conversions, one that returns the BFtype in a floating point +register and the other returns it in a general purpose register that is used +when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ + +/* Silence declaration without prototype warning. */ +extern BFtype __floatbitintbf (const UBILtype *, SItype); +extern unsigned short __floatbitintbf_gpr (const UBILtype *, SItype); + +/* BFtype returned in FPRs. */ +BFtype +__floatbitintbf (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_B) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (B, 1, A); + _FP_PACK_SEMIRAW (B, 1, A); + } + } + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +/* BFtype returned in GPRs. */ +unsigned short +__floatbitintbf_gpr (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_B) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (B, 1, A); + _FP_PACK_SEMIRAW (B, 1, A); + } + } + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} +#endif diff --git a/libgcc/config/rs6000/ppc-floatbitinthf.c b/libgcc/config/rs6000/ppc-floatbitinthf.c new file mode 100644 index 000000000000..f92376994fb6 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatbitinthf.c @@ -0,0 +1,102 @@ +/* Software floating-point emulation. + Convert a _BitInt to IEEE half. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/floatbitinthf.c. + +We provide 2 conversions, one that returns the BFtype in a floating point +register and the other returns it in a general purpose register that is used +when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ + +/* Silence declaration without prototype warning. */ +extern HFtype __floatbitinthf (const UBILtype *, SItype); +extern unsigned short __floatbitinthf_gpr (const UBILtype *, SItype); + +/* HFtype returned in FPRs. */ +HFtype +__floatbitinthf (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_H) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (H, 1, A); + _FP_PACK_SEMIRAW (H, 1, A); + } + } + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +/* HFtype returned in FPRs. */ +unsigned short +__floatbitinthf_gpr (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + union ushort_hf u; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_H) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (H, 1, A); + _FP_PACK_SEMIRAW (H, 1, A); + } + } + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} +#endif diff --git a/libgcc/config/rs6000/ppc-floatdibf.c b/libgcc/config/rs6000/ppc-floatdibf.c new file mode 100644 index 000000000000..12645b96b444 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatdibf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 32bit signed integer to bfloat16 + Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatdibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatdibf (DItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatdibf_gpr (DItype i) +{ + union ushort_bf u; + + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatdihf.c b/libgcc/config/rs6000/ppc-floatdihf.c new file mode 100644 index 000000000000..503a760d30e7 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatdihf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 32bit signed integer to hfloat16 + Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatdihf.c. + + We provide 2 conversions, one that returns the HFtype in a floating point + register and the other returns it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +HFtype +__floatdihf (DItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, DI_BITS, UDItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatdihf_gpr (DItype i) +{ + union ushort_hf u; + + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, DI_BITS, UDItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatsibf.c b/libgcc/config/rs6000/ppc-floatsibf.c new file mode 100644 index 000000000000..0dfeff248f96 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatsibf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 32bit signed integer to bfloat16 + Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatsibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatsibf (SItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatsibf_gpr (SItype i) +{ + union ushort_bf u; + + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatsihf.c b/libgcc/config/rs6000/ppc-floatsihf.c new file mode 100644 index 000000000000..fd5b64cbf4a4 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatsihf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 32bit signed integer to hfloat16 + Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatsihf.c. + + We provide 2 conversions, one that returns the HFtype in a floating point + register and the other returns it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +HFtype +__floatsihf (SItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, SI_BITS, USItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatsihf_gpr (SItype i) +{ + union ushort_hf u; + + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, SI_BITS, USItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floattibf.c b/libgcc/config/rs6000/ppc-floattibf.c new file mode 100644 index 000000000000..0503e77cf985 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floattibf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 128bit signed integer to bfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floattibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floattibf (TItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floattibf_gpr (TItype i) +{ + union ushort_bf u; + + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floattihf.c b/libgcc/config/rs6000/ppc-floattihf.c new file mode 100644 index 000000000000..b13016bea83b --- /dev/null +++ b/libgcc/config/rs6000/ppc-floattihf.c @@ -0,0 +1,69 @@ +/* Software floating-point emulation. + Convert a 128bit signed integer to hfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floattihf.c. + + We provide 2 conversions, one that returns the HFtype in a floating point + register and the other returns it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +HFtype +__floattihf (TItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, TI_BITS, UTItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floattihf_gpr (TItype i) +{ + union ushort_hf u; + + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, TI_BITS, UTItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatundibf.c b/libgcc/config/rs6000/ppc-floatundibf.c new file mode 100644 index 000000000000..6988882cba91 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatundibf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 64bit unsigned integer to bfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatundibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatundibf (UDItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatundibf_gpr (UDItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, DI_BITS, UDItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatundihf.c b/libgcc/config/rs6000/ppc-floatundihf.c new file mode 100644 index 000000000000..f2b0b002e276 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatundihf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 64bit unsigned integer to hfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatundihf.c. + + We provide 2 conversions, one that returns the HFtype in a floating point + register and the other returns it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +HFtype +__floatundihf (UDItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, DI_BITS, UDItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatundihf_gpr (UDItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + union ushort_hf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, DI_BITS, UDItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatunsibf.c b/libgcc/config/rs6000/ppc-floatunsibf.c new file mode 100644 index 000000000000..7fcd57eeb11c --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatunsibf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 32bit unsigned integer to IEEE half. + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/floatunssibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatunsibf (USItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatunsibf_gpr (USItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, SI_BITS, USItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatunsihf.c b/libgcc/config/rs6000/ppc-floatunsihf.c new file mode 100644 index 000000000000..10a264669a21 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatunsihf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 32bit unsigned integer to IEEE half. + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of softfp/floatunssihf.c. + + We provide 2 conversions, one that returns the HFtype in a floating point + register and the other returns it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +HFtype +__floatunsihf (USItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, SI_BITS, USItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatunsihf_gpr (USItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + union ushort_hf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, SI_BITS, USItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatuntibf.c b/libgcc/config/rs6000/ppc-floatuntibf.c new file mode 100644 index 000000000000..36af437af207 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatuntibf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 128bit unsigned integer to bfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatuntibf.c. + + We provide 2 conversions, one that returns the BFtype in a floating point + register and the other returns it in a general purpose register that is used + when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" + +BFtype +__floatuntibf (UTItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatuntibf_gpr (UTItype i) +{ + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, i, TI_BITS, UTItype); + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-floatuntihf.c b/libgcc/config/rs6000/ppc-floatuntihf.c new file mode 100644 index 000000000000..ac48cbda0284 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatuntihf.c @@ -0,0 +1,68 @@ +/* Software floating-point emulation. + Convert a 128bit unsigned integer to hfloat16 + Copyright (C) 2007-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. + + This is a clone of softfp/floatuntihf.c. + + We provide 2 conversions, one that returns the HFtype in a floating point + register and the other returns it in a general purpose register that is used + when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" + +HFtype +__floatuntihf (UTItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, TI_BITS, UTItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +unsigned short +__floatuntihf_gpr (UTItype i) +{ + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + union ushort_hf u; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, i, TI_BITS, UTItype); + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} diff --git a/libgcc/config/rs6000/ppc-truncbfhf2.c b/libgcc/config/rs6000/ppc-truncbfhf2.c new file mode 100644 index 000000000000..ff660ad52e7d --- /dev/null +++ b/libgcc/config/rs6000/ppc-truncbfhf2.c @@ -0,0 +1,130 @@ +/* Software floating-point emulation. + Truncate bfloat16 into IEEE half. + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of soft-fp/truncbfhf2.c for the PowerPC. + + We provide an alternative version of the conversion that retunrs the HFtype + value as unsigned short. This is to allow the calling sequence where + arguments are converted to the 32/64-bit scalar format. If we don't have + the hardware support, we can't use the standard __trunc function. */ + +#include "soft-fp.h" +#include "half.h" +#include "brain.h" +#include "single.h" + +/* BFtype and HFtype are unordered, neither is a superset or subset + of each other. Convert BFtype to SFtype (lossless) and then + truncate to HFtype. */ + +/* BFtype passed in FPR, HFtype returned in FPR. */ +HFtype +__truncbfhf2 (BFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_S (B); + FP_DECL_B (R); + SFtype b; + HFtype r; + + FP_INIT_ROUNDMODE; + /* Optimize BFtype to SFtype conversion to simple left shift + by 16 if possible, we don't need to raise exceptions on sNaN + here as the SFtype to HFtype truncation should do that too. */ + if (sizeof (BFtype) == 2 + && sizeof (unsigned short) == 2 + && sizeof (SFtype) == 4 + && sizeof (unsigned int) == 4) + { + union { BFtype a; unsigned short b; } u1; + union { SFtype a; unsigned int b; } u2; + u1.a = a; + u2.b = (u1.b << 8) << 8; + b = u2.a; + } + else + { + FP_UNPACK_RAW_B (A, a); + FP_EXTEND (S, B, 1, 1, B, A); + FP_PACK_RAW_S (b, B); + } + FP_UNPACK_SEMIRAW_S (B, b); + FP_TRUNC (H, S, 1, 1, R, B); + FP_PACK_SEMIRAW_H (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* BFtype passed in GPR, HFtype returned in GPR. */ +unsigned short +__truncbfhf2_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_S (B); + FP_DECL_B (R); + SFtype b; + HFtype r; + BFtype a; + union ushort_bf ubf; + union ushort_hf uhf; + + ubf.us = us; + a = ubf.bf; + + FP_INIT_ROUNDMODE; + /* Optimize BFtype to SFtype conversion to simple left shift + by 16 if possible, we don't need to raise exceptions on sNaN + here as the SFtype to HFtype truncation should do that too. */ + if (sizeof (BFtype) == 2 + && sizeof (unsigned short) == 2 + && sizeof (SFtype) == 4 + && sizeof (unsigned int) == 4) + { + union { BFtype a; unsigned short b; } u1; + union { SFtype a; unsigned int b; } u2; + u1.a = a; + u2.b = (u1.b << 8) << 8; + b = u2.a; + } + else + { + FP_UNPACK_RAW_B (A, a); + FP_EXTEND (S, B, 1, 1, B, A); + FP_PACK_RAW_S (b, B); + } + FP_UNPACK_SEMIRAW_S (B, b); + FP_TRUNC (H, S, 1, 1, R, B); + FP_PACK_SEMIRAW_H (r, R); + FP_HANDLE_EXCEPTIONS; + + uhf.hf = r; + return uhf.us; +} diff --git a/libgcc/config/rs6000/ppc-trunchfbf2.c b/libgcc/config/rs6000/ppc-trunchfbf2.c new file mode 100644 index 000000000000..747a90c996ef --- /dev/null +++ b/libgcc/config/rs6000/ppc-trunchfbf2.c @@ -0,0 +1,96 @@ +/* Software floating-point emulation. + Truncate IEEE half into bfloat16. + Copyright (C) 2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of soft-fp/trunchfbf2.c for the PowerPC. + + We provide an alternative version of the conversion that retunrs the HFtype + value as unsigned short. This is to allow the calling sequence where + arguments are converted to the 32/64-bit scalar format. If we don't have + the hardware support, we can't use the standard __trunc function */ + +#include "soft-fp.h" +#include "brain.h" +#include "half.h" +#include "single.h" + +/* BFtype and HFtype are unordered, neither is a superset or subset + of each other. Convert HFtype to SFtype (lossless) and then + truncate to BFtype. */ + +/* HFtype passed in FPR, BFtype returned in FPR. */ +BFtype +__trunchfbf2 (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_S (B); + FP_DECL_B (R); + SFtype b; + BFtype r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_RAW_H (A, a); + FP_EXTEND (S, H, 1, 1, B, A); + FP_PACK_RAW_S (b, B); + FP_UNPACK_SEMIRAW_S (B, b); + FP_TRUNC (B, S, 1, 1, R, B); + FP_PACK_SEMIRAW_B (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* HFtype passed in GPR, BFtype returned in GPR. */ +unsigned short +__trunchfbf2_gpr (unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_S (B); + FP_DECL_B (R); + SFtype b; + BFtype r; + HFtype a; + union ushort_bf ubf; + union ushort_hf uhf; + + uhf.us = us; + a = uhf.hf; + + FP_INIT_ROUNDMODE; + FP_UNPACK_RAW_H (A, a); + FP_EXTEND (S, H, 1, 1, B, A); + FP_PACK_RAW_S (b, B); + FP_UNPACK_SEMIRAW_S (B, b); + FP_TRUNC (B, S, 1, 1, R, B); + FP_PACK_SEMIRAW_B (r, R); + FP_HANDLE_EXCEPTIONS; + + ubf.bf = r; + return ubf.us; +} diff --git a/libgcc/config/rs6000/sfp-machine.h b/libgcc/config/rs6000/sfp-machine.h index b6dd03a710e3..b37bf0903a87 100644 --- a/libgcc/config/rs6000/sfp-machine.h +++ b/libgcc/config/rs6000/sfp-machine.h @@ -170,42 +170,105 @@ void __sfp_handle_exceptions (int); /* Add prototypes for the HFmode and BFmode functions. */ typedef double DFtype2; typedef float SFtype2; -typedef int DItype2 __attribute__ ((mode (DI))); -typedef unsigned int UDItype2 __attribute__ ((mode (DI))); +typedef int HItype2 __attribute__ ((mode (HI))); +typedef unsigned int UHItype2 __attribute__ ((mode (HI))); typedef int SItype2 __attribute__ ((mode (SI))); typedef unsigned int USItype2 __attribute__ ((mode (SI))); +typedef int DItype2 __attribute__ ((mode (DI))); +typedef unsigned int UDItype2 __attribute__ ((mode (DI))); +typedef int TItype2 __attribute__ ((mode (TI))); +typedef unsigned int UTItype2 __attribute__ ((mode (TI))); + +/* We have 2 different conversion functions. One passes or returns the 16-bit + floating point type in a floating point register, and the other passes or + returns it in a general purpose register. If 16-bit floating point is + normally converted to the 32/64-bit scalar represention, we need a function + that does not do this conversion. */ +#define PASS_FP16(NAME, RET, FP16) \ +extern RET NAME (FP16); \ +extern RET NAME ## _gpr (UHItype2) + +#define PASS_FP16_2(NAME, RET, FP16_1, FP16_2) \ +extern RET NAME (FP16_1, FP16_2); \ +extern RET NAME ## _gpr (UHItype2, UHItype2) + +#define RETURN_FP16(NAME, FP16, ARG) \ +extern FP16 NAME (ARG); \ +extern UHItype2 NAME ## _gpr (ARG) + +#define CONVERT_FP16(NAME, FP16_RET, FP16_ARG) \ +extern FP16_RET NAME (FP16_ARG); \ +extern UHItype2 NAME ## _gpr (UHItype2) #ifdef __FLOAT16__ typedef float HFtype2 __attribute__ ((mode (HF))); -extern CMPtype __eqhf2 (HFtype2, HFtype2); -extern DFtype2 __extendhfdf2 (HFtype2); -extern SFtype2 __extendhfsf2 (HFtype2); -extern DItype2 __fixhfdi (HFtype2); -extern SItype2 __fixhfsi (HFtype2); -extern UDItype2 __fixunshfdi (HFtype2); -extern USItype2 __fixunshfsi (HFtype2); -extern HFtype2 __floatdihf (DItype2); -extern HFtype2 __floatsihf (SItype2); -extern HFtype2 __floatundihf (UDItype2); -extern HFtype2 __floatunsihf (USItype2); -extern HFtype2 __truncdfhf2 (DFtype2); -extern HFtype2 __truncsfhf2 (SFtype2); +/* Move between HFtype and unsigned short. */ +union ushort_hf { + unsigned short us; + HFtype2 hf; +}; + +PASS_FP16_2 (__eqhf2, CMPtype, HFtype2, HFtype2); + +PASS_FP16 (__extendhfsf2, SFtype2, HFtype2); +PASS_FP16 (__extendhfdf2, DFtype2, HFtype2); + +PASS_FP16 (__fixhfsi, SItype2, HFtype2); +PASS_FP16 (__fixhfdi, DItype2, HFtype2); +PASS_FP16 (__fixhfti, TItype2, HFtype2); + +PASS_FP16 (__fixunshfsi, USItype2, HFtype2); +PASS_FP16 (__fixunshfdi, UDItype2, HFtype2); +PASS_FP16 (__fixunshfti, UTItype2, HFtype2); + +RETURN_FP16 (__floatsihf, HFtype2, SItype2); +RETURN_FP16 (__floatdihf, HFtype2, DItype2); +RETURN_FP16 (__floattihf, HFtype2, TItype2); + +RETURN_FP16 (__floatunsihf, HFtype2, USItype2); +RETURN_FP16 (__floatundihf, HFtype2, UDItype2); +RETURN_FP16 (__floatuntihf, HFtype2, UTItype2); + +RETURN_FP16 (__truncsfhf2, HFtype2, SFtype2); +RETURN_FP16 (__truncdfhf2, HFtype2, DFtype2); #endif #ifdef __BFLOAT16__ typedef float BFtype2 __attribute__ ((mode (BF))); -extern SFtype2 __extendbfsf2 (BFtype2); -extern BFtype2 __floatdibf (DItype2); -extern BFtype2 __floatsibf (SItype2); -extern BFtype2 __floatundibf (UDItype2); -extern BFtype2 __floatunsibf (USItype2); -extern BFtype2 __truncdfbf2 (DFtype2); -extern BFtype2 __truncsfbf2 (SFtype2); +/* Move between BFtype and unsigned short. */ +union ushort_bf { + unsigned short us; + BFtype2 bf; +}; + +PASS_FP16_2 (__eqbf2, CMPtype, BFtype2, BFtype2); + +PASS_FP16 (__extendbfsf2, SFtype2, BFtype2); +PASS_FP16 (__extendbfdf2, DFtype2, BFtype2); + +PASS_FP16 (__fixbfsi, SItype2, BFtype2); +PASS_FP16 (__fixbfdi, DItype2, BFtype2); +PASS_FP16 (__fixbfti, TItype2, BFtype2); + +PASS_FP16 (__fixunsbfsi, USItype2, BFtype2); +PASS_FP16 (__fixunsbfdi, UDItype2, BFtype2); +PASS_FP16 (__fixunsbfti, UTItype2, BFtype2); + +RETURN_FP16 (__floatsibf, BFtype2, SItype2); +RETURN_FP16 (__floatdibf, BFtype2, DItype2); +RETURN_FP16 (__floattibf, BFtype2, TItype2); + +RETURN_FP16 (__floatunsibf, BFtype2, USItype2); +RETURN_FP16 (__floatundibf, BFtype2, UDItype2); +RETURN_FP16 (__floatuntibf, BFtype2, UTItype2); + +RETURN_FP16 (__truncsfbf2, BFtype2, SFtype2); +RETURN_FP16 (__truncdfbf2, BFtype2, DFtype2); #endif #if defined(__FLOAT16__) && defined(__BFLOAT16__) -extern HFtype2 __truncbfhf2 (BFtype2); -extern BFtype2 __trunchfbf2 (HFtype2); +CONVERT_FP16 (__truncbfhf2, HFtype2, BFtype2); +CONVERT_FP16 (__trunchfbf2, BFtype2, HFtype2); #endif diff --git a/libgcc/config/rs6000/t-float16 b/libgcc/config/rs6000/t-float16 index f77df910b3ff..6b548b084fef 100644 --- a/libgcc/config/rs6000/t-float16 +++ b/libgcc/config/rs6000/t-float16 @@ -1,32 +1,36 @@ -# _Float16 library support - -fp16_funcs = eqhf2 extendhfdf2 extendhfsf2 \ - fixhfsi fixhfdi fixhfti fixunshfsi fixunshfdi fixunshfti \ - floatsihf floatdihf floattihf floatunsihf floatundihf floatuntihf \ - truncdfhf2 truncsfhf2 - -fp16_src = $(addprefix $(srcdir)/soft-fp/,$(addsuffix .c,$(fp16_funcs))) +# _Float16 library support, source files in soft-ftp +fp16_funcs = extendhf-sfdf2 truncsfdf-hf2 \ + ppc-fixhfsi ppc-fixhfdi ppc-fixhfti \ + ppc-fixunshfsi ppc-fixunshfdi ppc-fixunshfti \ + ppc-floatsihf ppc-floatdihf ppc-floattihf \ + ppc-floatunsihf ppc-floatundihf ppc-floatuntihf \ + ppc-eqhf2 ppc-floatbitinthf ppc-fixhfbitint + +fp16_src = $(addprefix $(srcdir)/config/rs6000/,$(addsuffix .c,$(fp16_funcs))) fp16_obj = $(addsuffix $(objext),$(fp16_funcs)) FP16_CFLAGS = -mfloat16 -Wno-psabi \ - -I$(srcdir)/soft-fp -I$(srcdir)/config/rs6000 + -I$(srcdir)/soft-fp \ + -I$(srcdir)/config/rs6000 $(fp16_obj) : INTERNAL_CFLAGS += $(FP16_CFLAGS) -# __bfloat16 library support +# __bf16 library support, source files in config/rs6000 +bfp16_funcs = extendbf-sfdf2 truncsfdf-bf2 \ + ppc-floatsibf ppc-floatdibf ppc-floattibf \ + ppc-floatunsibf ppc-floatundibf ppc-floatuntibf \ + ppc-fixbfsi ppc-fixbfdi ppc-fixbfti \ + ppc-fixunsbfsi ppc-fixunsbfdi ppc-fixunsbfti \ + ppc-eqbf2 ppc-floatbitintbf ppc-fixbfbitint -bfp16_funcs = extendbfsf2 floatdibf floatsibf floatundibf floatunsibf \ - truncdfbf2 truncsfbf2 - -bfp16_src = $(addprefix $(srcdir)/soft-fp/,$(addsuffix .c,$(bfp16_funcs))) +bfp16_src = $(addprefix $(srcdir)/config/rs6000/,$(addsuffix .c,$(bfp16_funcs))) bfp16_obj = $(addsuffix $(objext),$(bfp16_funcs)) $(bfp16_obj) : INTERNAL_CFLAGS += $(FP16_CFLAGS) -# Conversion between __bfloat16 and _Float16 - -both_fp16_funcs = truncbfhf2 trunchfbf2 -both_fp16_src = $(addprefix $(srcdir)/soft-fp/,$(addsuffix .c,$(both_fp16_funcs))) +# Conversion between __bf16 and _Float16 +both_fp16_funcs = ppc-truncbfhf2 ppc-trunchfbf2 +both_fp16_src = $(addprefix $(srcdir)/config/rs6000/,$(addsuffix .c,$(both_fp16_funcs))) both_fp16_obj = $(addsuffix $(objext),$(both_fp16_funcs)) $(both_fp16_obj) : INTERNAL_CFLAGS += $(FP16_CFLAGS) diff --git a/libgcc/config/rs6000/truncsfdf-bf2.c b/libgcc/config/rs6000/truncsfdf-bf2.c new file mode 100644 index 000000000000..6733c8df2419 --- /dev/null +++ b/libgcc/config/rs6000/truncsfdf-bf2.c @@ -0,0 +1,95 @@ +/* Software floating-point emulation. + Truncate IEEE single into IEEE half. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of soft-fp/truncdfbf2.c for the PowerPC. + + We provide an alternative version of the conversion that retunrs the HFtype + value as unsigned short. This is to allow the calling sequence where + arguments are converted to the 32/64-bit scalar format. If we don't have + the hardware support, we can't use the standard __trunc function. */ + +#include "soft-fp.h" +#include "brain.h" +#include "single.h" +#include "double.h" + +/* Return BFtype in a FPR register. */ +BFtype +__truncsfbf2 (SFtype a) +{ + FP_DECL_EX; + FP_DECL_S (A); + FP_DECL_B (R); + BFtype r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_SEMIRAW_D (A, a); +#if _FP_W_TYPE_SIZE < _FP_FRACBITS_D + FP_TRUNC (B, D, 1, 2, R, A); +#else + FP_TRUNC (B, D, 1, 1, R, A); +#endif + FP_PACK_SEMIRAW_B (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* Return BFtype in a GPR register. */ +unsigned short +__truncsfbf2_gpr (SFtype a) +{ + union ushort_bf u; + + FP_DECL_EX; + FP_DECL_S (A); + FP_DECL_B (R); + BFtype r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_SEMIRAW_D (A, a); +#if _FP_W_TYPE_SIZE < _FP_FRACBITS_D + FP_TRUNC (B, D, 1, 2, R, A); +#else + FP_TRUNC (B, D, 1, 1, R, A); +#endif + FP_PACK_SEMIRAW_B (r, R); + FP_HANDLE_EXCEPTIONS; + + u.bf = r; + return u.us; +} + +/* On the PowerPC DFtype scalars use the same encoding as SFtype, so use the + same function for both. */ +__asm__ ("\n" + "\t.globl __truncdfbf2\n" + "__truncdfbf2 = __truncsfbf2\n" + "\n" + "\t.globl __truncdfbf2_gpr\n" + "__truncdfbf2_gpr = __truncsfbf2_gpr\n"); diff --git a/libgcc/config/rs6000/truncsfdf-hf2.c b/libgcc/config/rs6000/truncsfdf-hf2.c new file mode 100644 index 000000000000..c2392e60262b --- /dev/null +++ b/libgcc/config/rs6000/truncsfdf-hf2.c @@ -0,0 +1,87 @@ +/* Software floating-point emulation. + Truncate IEEE single into IEEE half. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. + + This is a clone of soft-fp/truncsfhf2.c for the PowerPC. + + We provide an alternative version of the conversion that retunrs the HFtype + value as unsigned short. This is to allow the calling sequence where + arguments are converted to the 32/64-bit scalar format. If we don't have + the hardware support, we can't use the standard __trunc function. */ + +#include "soft-fp.h" +#include "half.h" +#include "single.h" +#include "double.h" + +/* Return HFtype in a FPR register. */ +HFtype +__truncsfhf2 (SFtype a) +{ + FP_DECL_EX; + FP_DECL_S (A); + FP_DECL_H (R); + HFtype r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_SEMIRAW_S (A, a); + FP_TRUNC (H, S, 1, 1, R, A); + FP_PACK_SEMIRAW_H (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +/* Return HFtype in a GPR register. */ +unsigned short +__truncsfhf2_gpr (SFtype a) +{ + union ushort_hf u; + + FP_DECL_EX; + FP_DECL_S (A); + FP_DECL_H (R); + HFtype r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_SEMIRAW_S (A, a); + FP_TRUNC (H, S, 1, 1, R, A); + FP_PACK_SEMIRAW_H (r, R); + FP_HANDLE_EXCEPTIONS; + + u.hf = r; + return u.us; +} + +/* On the PowerPC DFtype scalars use the same encoding as SFtype, so use the + same function for both. */ +__asm__ ("\n" + "\t.globl __truncdfhf2\n" + "__truncdfhf2 = __truncsfhf2\n" + "\n" + "\t.globl __truncdfhf2_gpr\n" + "__truncdfhf2_gpr = __truncsfhf2_gpr\n");
